[SOLVED] A13-OLinuXino (-MICRO/-WIFI) + mainline kernel + SPI

Started by Melange, May 18, 2018, 11:49:38 AM

Previous topic - Next topic

Melange

Hello,

in our tests with using the current mainline kernel we noticed that SPI2 seems dead.

In the kernel config I have CONFIG_SPI amd CONFIG_SPI_SPIDEV enabled, and in the device tree I have both spi2 (/soc@1c00000/spi@1c17000) and spidev2 (/soc@1c00000/spi@1c17000/spidev) enabled.

I see /dev/spidev2.0 after booting, the kernel only complains (loudly) about the presence of spidev in the device tree, but this is not a bug.

I can compile https://github.com/torvalds/linux/blob/master/tools/spi/spidev_test.c and it runs just find, returning all zeros in the SPI transfer response (no slave connected).

We connected a PicoScope to the 4 SPI terminals on the board (tested with A13, A13-Micro and A13-WIFI), and all 4 pins are constantly dead. We see no clock or anything.

I can find a lot of information about sunxi and spi from the sunxi-kernel, but nothing specific to the mainline kernel.

Has anybody tested spi with the mainline kernel?

Any help would be greatly appreciated!

(spi is the only thing not working for me with the mainline kernel, everythings else including the lcds and touch controller, audio, usb etc. work flawlessly)

Melange

I solved it myself after taking a second look.

For Linux kernel 4.19.4 (the current), add this to your device tree for spi2 and spidev2 support:

&spi2 {
    pinctrl-names = "default";
    pinctrl-0 = <&spi2_pins_a>, <&spi2_cs0_pins_a>;
    spidev2: spidev {
        compatible = "spidev";
        reg = <0>;
        spi-max-frequency = <1000000>;
        status = "disabled";
    };
};


What I had missed last time was the two pinctrl lines, which I realised when re-reading http://linux-sunxi.org/SPIdev#Configuring_your_device-tree_.28mainline.29

Make sure to enable both device tree nodes spi2 and spidev2 in order to get /dev/spidev2.0 in your file system, as these nodes are disabled by default.

SPI2 works. From looking at the scheme file it looks like we could also use SPI0. SPI1 does not seem to be accessible (via GPIO-2 and UEXT headers).

For SPI0 add this to your device tree:

&pio {
    spi0_pins_a: spi0@0 {
        pins = "PC2", "PC0", "PC1";
        function = "spi0";
    };
    spi0_cs0_pins_a: spi0-cs0@0 {
        pins = "PC3";
        function = "spi0";
    };
};

&spi0 {
    pinctrl-names = "default";
    pinctrl-0 = <&spi0_pins_a>, <&spi0_cs0_pins_a>;
    spidev0: spidev {
        compatible = "spidev";
        reg = <0>;
        spi-max-frequency = <1000000>;
        status = "disabled";
    };
};


And these aliases, if you want:

/ {
    aliases {
        spi0    = &spi0;
        spidev0 = &spidev0;
        spi2    = &spi2;
        spidev2 = &spidev2;
    };
};