STM32MP1 schematic

[MarcC137]

I've noticed that the schematic for the STM32MP1 has the DDR lines not in order.

i.e. DQL0 -> DQ5 | DQL1 -> DQ1 ...

Is this correct?

[LubOlimex]

Yes, it is correct. You can misarrange the bits in the byte.

[MarcC137]

Oh OK thanks, learned something new.