flash failure every other time for STM32F217 using ARM-USB-OCD & OpenOCD

[veneff]

Hi

I'm having difficulties flashing the STM32F217 that resides on a STM3221G-eval board using the Olimex ARM-USB-OCD via OpenOCD.  It fails every other time and I have no idea as to why.

I'm showing below the OpenOCD interface, board & stm32f2x.cfg config files and my config file, I also show the debug level 2 logs for both a success and failed attempts.

Thanks for any insight you can give me!
Vance

My OpenOCD opencod.cfg file:

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source [find olimex-arm-usb-ocd.cfg]
source [find stm3221g_eval.cfg]
proc flash_debug {target_file} {
#reset init
init
targets
halt
flash write_image erase $target_file
verify_image $target_file
reset run
shutdown
}


OpenOCD stm3221g_eval.cfg file:

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# STM3221G-EVAL: This is an STM32F2 eval board with a single STM32F217IGH6
# (128KB) chip.
# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1199/PF251702
# increase working area to 128KB
set WORKAREASIZE 0x20000
# chip name
set CHIPNAME STM32F217IGH6
source [find stm32f2x.cfg]


OpenOCD olimex-arm-usb-ocd.cfg file:

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#
# Olimex ARM-USB-OCD
#
# http://www.olimex.com/dev/arm-usb-ocd.html
#
interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG"
ft2232_layout olimex-jtag
ft2232_vid_pid 0x15ba 0x0003


OpenOCD stm32f2x.cfg file:

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# script for stm32f2x family

if { [info exists CHIPNAME] } {
   set _CHIPNAME $CHIPNAME
} else {
   set _CHIPNAME stm32f2x
}

if { [info exists ENDIAN] } {
   set _ENDIAN $ENDIAN
} else {
   set _ENDIAN little
}

# Work-area is a space in RAM used for flash programming
# By default use 64kB
if { [info exists WORKAREASIZE] } {
   set _WORKAREASIZE $WORKAREASIZE
} else {
   set _WORKAREASIZE 0x10000
}

# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
#
# Since we may be running of an RC oscilator, we crank down the speed a
# bit more to be on the safe side. Perhaps superstition, but if are
# running off a crystal, we can run closer to the limit. Note
# that there can be a pretty wide band where things are more or less stable.
adapter_khz 1000

adapter_nsrst_delay 100
jtag_ntrst_delay 100

#jtag scan chain
if { [info exists CPUTAPID] } {
   set _CPUTAPID $CPUTAPID
} else {
  # See STM Document RM0033
  # Section 32.6.3 - corresponds to Cortex-M3 r2p0
   set _CPUTAPID 0x4ba00477
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

if { [info exists BSTAPID] } {
   set _BSTAPID $BSTAPID
} else {
  # See STM Document RM0033
  # Section 32.6.2
  #
  set _BSTAPID 0x06411041
}
jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME

$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0

set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME

# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m reset_config sysresetreq


debug level 2 log output on a successful flash:

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"..\..\openocd-0.8.0-dev-130717143429\bin-x64\openocd-x64-0.8.0-dev-130717143429.exe" -d2 -f openocd.cfg -c "flash_debug ./bin/debug/TDP_eval_test.elf"
Open On-Chip Debugger 0.8.0-dev-00094-gc658229 (2013-07-21-11:25)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.sourceforge.net/doc/doxygen/bugs.html
debug_level: 2
Info : only one transport option; autoselect 'jtag'
adapter speed: 1000 kHz
adapter_nsrst_delay: 100
jtag_ntrst_delay: 100
cortex_m3 reset_config sysresetreq
flash_debug
Info : clock speed 1000 kHz
Info : JTAG tap: STM32F217IGH6.cpu tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
Info : JTAG tap: STM32F217IGH6.bs tap/device found: 0x06411041 (mfg: 0x020, part: 0x6411, ver: 0x0)
Info : STM32F217IGH6.cpu: hardware has 6 breakpoints, 4 watchpoints
Error: STM32F217IGH6.cpu -- clearing lockup after double fault
Polling target STM32F217IGH6.cpu failed, GDB will be halted. Polling again in 100ms
Polling target STM32F217IGH6.cpu succeeded again
    TargetName         Type       Endian TapName            State       
--  ------------------ ---------- ------ ------------------ ------------
0* STM32F217IGH6.cpu  cortex_m   little STM32F217IGH6.cpu  halted
auto erase enabled
Info : device id = 0x20016411
Info : flash size = 1024kbytes
wrote 262144 bytes from file ./bin/debug/TDP_eval_test.elf in 8.389000s (30.516 KiB/s)
verified 174304 bytes in 0.510000s (333.762 KiB/s)
Info : JTAG tap: STM32F217IGH6.cpu tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
Info : JTAG tap: STM32F217IGH6.bs tap/device found: 0x06411041 (mfg: 0x020, part: 0x6411, ver: 0x0)
shutdown command invoked
Process terminated with status 0 (0 minutes, 10 seconds)
0 errors, 0 warnings (0 minutes, 10 seconds)


debug level 2 log output on a failure:

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"..\..\openocd-0.8.0-dev-130717143429\bin-x64\openocd-x64-0.8.0-dev-130717143429.exe" -d2 -f openocd.cfg -c "flash_debug ./bin/debug/TDP_eval_test.elf"
Open On-Chip Debugger 0.8.0-dev-00094-gc658229 (2013-07-21-11:25)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.sourceforge.net/doc/doxygen/bugs.html
debug_level: 2
Info : only one transport option; autoselect 'jtag'
adapter speed: 1000 kHz
adapter_nsrst_delay: 100
jtag_ntrst_delay: 100
cortex_m3 reset_config sysresetreq
flash_debug
Info : clock speed 1000 kHz
Info : JTAG tap: STM32F217IGH6.cpu tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
Info : JTAG tap: STM32F217IGH6.bs tap/device found: 0x06411041 (mfg: 0x020, part: 0x6411, ver: 0x0)
Info : STM32F217IGH6.cpu: hardware has 6 breakpoints, 4 watchpoints
    TargetName         Type       Endian TapName            State       
--  ------------------ ---------- ------ ------------------ ------------
0* STM32F217IGH6.cpu  cortex_m   little STM32F217IGH6.cpu  running
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x61000000 pc: 0x0802b718 psp: 0x20007a00
auto erase enabled
Info : device id = 0x20016411
Info : flash size = 1024kbytes
Error: timeout waiting for algorithm, a target reset is recommended
Error: error executing stm32x flash write algorithm
Error: flash write failed = 00000040
Error: error writing to flash at address 0x08000000 at offset 0x00020000
Runtime Error: openocd.cfg:9:
in procedure 'flash_debug'
in procedure 'flash' called at file "openocd.cfg", line 9
Process terminated with status 1 (0 minutes, 11 seconds)
1 errors, 0 warnings (0 minutes, 11 seconds)


[JohnS]

Ideas:
1. don't hesitate to join the oocd mailing list and ask
2. move to "ftdi" (see interface/ftdi) cfg files instead of ft2232 ones, so that you use the modern libftdi/libusb/etc code rather than the buggy old stuff

John