A10 and A20 DDR3 memory connections

[crazy_m]

Hi everybody,

I got few samples of A20 chip from some distributor from China, and I'm trying to make my own A20 board.
I have a couple of years experience in PCB design and routing, mostly in Eagle and Altium Designer, done few commercial SoC projects and so on...

My question to Olimex community is difference in A10 and A20 DRAM pinout. As I can see, all of your A20 boards are routed exactly the same as A10 boards, including DRAM memory routing, but if I look into the datasheet of A10 and A20, pinout for DATA lines are different, DQ0 of A10 is on ball AB4, but in A20 is on ball AC7.

So, can someone explain to me how this setup works on both SoCs, and should I use pinout from A20 datasheet or pinout from A10 which Olimex is using for 512MBx16 configuration.

Thank you very much.

Best regards,
Mirza



   

[progmetalbg]

http://olimex.wordpress.com/2013/04/05/allwinners-a10-and-a20-are-they-really-pin-to-pin-compatible-and-drop-in-replacement/

[crazy_m]

Thanks for reply,

I've read this blog post before posting on forum.
But, I'm asking about  A10 and A20 DRAM controller SDQ pins.
On A10 SDQ0..31 pins are on AB4,AC7,AC4,AB8,AC8,...,K2 balls, on A20 they are on AC7,AC4,AC8,AB5,..,H2, respectively, so using these pins, SDQ0 on A10 would be SDQ6 on A20.

Using this pinout, and droping A20 as replacement for A10, will cause that D0 pin on DDR3 chip will be connected to SDQ6 pin on A20, not on SDQ0 pin as should be.

Best regards,
Mirza