ICE40HX8K LVDS

[Ste_trat]

Hi,

i am currently searching the web for a lattice EVB with LVDS capability, since i want to implement some high speed ADC´s with LVDS interface to my project.

From the KiCad files, i see that there is none of the FPGA´s IO differentially routed.
is this correct?

Regards, S.T