Hello to all

[meyre76]

Hi,

I am testing an Olinuxino A20 Custom board and I am getting plenty of memory errors.
I think that the problem can be related to line impedance on the memory bus.
Rechecking the project I see that I haven't paid the attention needed to the layer stacking of the PCB.
I don't know exactly what layer arrangement is done on the Olimex stock board, but in my case I am using 0,35mm between the DDR3 traces and the first ground plane. I guess that I have changed the impedance from the original 60 Ohms to something terrible like 90 or so .
Does anyone know what is the layer arrangement of Olinuxino A20 Micro? I am thinking of an arrangement that keeps a distance between top to the first inner layer (ground plane) of 0,13, but I am not 100% sure if this will be OK.

Thanks in advance