A20 Olinuxino Lime UART pins on GPIO headers

[vnv]

Hi everyone!

could someone please share at which pins could UART's be found?

Also, where and how are they configured. How could one find where the configuration is made for the layout.

A20 datasheet has it's pins, then there is DTS/DTB and then there is possible Linux configuration for it - If someone could explain it it would be of great help.

BR!

[LubOlimex]

Go here and at the bottom you can find the definitions in Olimage Linux:  https://github.com/OLIMEX/olinuxino-overlays/tree/master/sun7i-a20

Inside the definitions you can find what pins you can use, for example for UART3 we can see:

uart3_pg_pins: uart3-pg-pins {
            pins = "PG6", "PG7";
            function = "uart3";

Which means UART it is pins PG6 and PG7. Then you download and inspect the schematic where is PG6 and PG7:

https://github.com/OLIMEX/OLINUXINO/blob/master/HARDWARE/A20-OLinuXino-LIME/1.%20Latest%20hardware%20revision/A20-OLinuXino-Lime_Rev_I3.pdf

It is on GPIO1 pins #17 and #19.

Remember to run olinuxino-overlay script to enable the desired UARTs.

[vnv]

Big thank you!