A20-SOM GPIO-6

[rafaelpgw]

Hi,

Where can I find the position of the 14-pin GPIO-6 row of pinholes in A20-SOM (Rev C)?

I cant find it on "A20-SOM-4GB user's manual" nor on "A20-SOM board dimensions in PNG format".

Thanks in advance.

[Gerrit]

Where can I find the position of the 14-pin GPIO-6 row of pinholes in A20-SOM (Rev C)?

there is no GPIO-6 only 1-5 and LCD_CON the pin numbering is printed on the board

1 3 5 7.............39
2 4 6 8.............40

https://www.olimex.com/wiki/A20-SOM#Hardware

[rafaelpgw]

From A20-SOM-user-manual.pdf, Revision G, February 2015:

"One of the notable changes introduced in hardware revision C of the design, is the addition
of GPIO-6 row of pinholes that provides easier access to some additional pins."

"2. Added GPIO-6 connector with the following signals FMINL, FMINR,
TVIN2, TVIN3, VMIC_OUT, AXP_BACKUP, AXP_RST, AXP_PWRON, UBOOT_SEL,
VDD_RTC and GND;"

"Note that major changes in the hardware design were introduced in A20-SOM board revision C.
Boards from the initial couple of revisions have visible differences compared to boards from
revisions C and on. Yet, the two major functional differences are the improved memory clock speed
(480MHz compared to the initial 384MHz) and the presence of the additional GPIO-6 connector."

On "Table of Contents" it says it is a 10 pin connector, but on the description there are 14 pins.

But I can't find any document with its position on the A20-SOM pcb.

[Gerrit]

Sorry you are right they do describe it in the manual and also added in the schematics (Additional Extension)

https://github.com/OLIMEX/SOM/blob/master/A20/A20-SOM/A20-SOM_board_rev_D.pdf

But can't find a picture of the board with this connector either, some updating to do for the Olimex people.