VGA over LCD

[martenjacobs]

Hi all,

I'd like to create a dual-VGA baseboard for the A20-SOM, which I gather should be possible by converting the parallel LCD1 port into VGA using something like this, which was designed for Raspberry Pi. I've soldered something very similar to the aforementioned VGA666 onto a prototype board (the only thing I changed is that I placed the resistors in sequence, as I have no reason to adhere to the RPI's pinout, and replaced the connector with 20 wires, so I can connect them to any pin) and have confirmed it works with an RPi B2 (colors are a bit off, but I'm not bothered by that now, it's probably caused by using 10% resistors). Now I'd like to connect it to the A20-OLinuXino I'm using for testing.
It seems a signal is produced, as I'm getting an 'Input not supported'-message on my VGA display. Furthermore, after a few minutes the display sleeps, and it wakes up again when I move the mouse. However, I have no real way of debugging the signal, as I only have a BitScope BS05U which only goes up to 20Mhz, so I think the best way to continue is to make sure everything should work in theory.

I'm running the current Jessie image and I'm trying to output 800x600 at 60Hz, currently to LCD0 (I think I've read this shares the sync pins with the built-in VGA, but for now I'm just proving the concept, later I'll be using LCD1 anyway). I think something's wrong with my fex settings. I guess I don't know enough about VGA to find the correct values for some of the settings. Here's (what I think is) the relevant section from my FEX:

Code (FEX) Select Expand


[disp_init]
disp_init_enable = 1
disp_mode = 0
screen0_output_type = 1
screen0_output_mode = 5
screen1_output_type = 1
screen1_output_mode = 5
fb0_framebuffer_num = 2
fb0_format = 9
fb0_pixel_sequence = 2
fb0_scaler_mode_enable = 0
fb1_framebuffer_num = 2
fb1_format = 9
fb1_pixel_sequence = 2
fb1_scaler_mode_enable = 0
lcd0_backlight = 197
lcd1_backlight = 197
lcd0_bright = 50
lcd0_contrast = 50
lcd0_saturation = 57
lcd0_hue = 50
lcd1_bright = 50
lcd1_contrast = 50
lcd1_saturation = 57
lcd1_hue = 50

[lcd0_para]
lcd_used = 1
lcd_x = 800
lcd_y = 600
lcd_dclk_freq = 30
lcd_pwm_not_used = 1
lcd_pwm_ch = 0
lcd_pwm_freq = 10000
lcd_pwm_pol = 1
lcd_if = 0
lcd_hbp = 216
lcd_ht = 1056
lcd_vbp = 23
lcd_vt = 1256
lcd_hv_if = 0
lcd_hv_smode = 0
lcd_hv_s888_if = 0
lcd_hv_syuv_if = 0
lcd_hv_vspw = 4
lcd_hv_hspw = 128
lcd_lvds_ch = 0
lcd_lvds_mode = 0
lcd_lvds_bitwidth = 0
lcd_lvds_io_cross = 0
lcd_cpu_if = 0
lcd_frm = 1
lcd_io_cfg0 = 268435456
lcd_gamma_correction_en = 0
lcd_gamma_tbl_0 = 0x0
lcd_gamma_tbl_1 = 0x10101
lcd_gamma_tbl_255 = 0xffffff
lcd_bl_en_used = 0
lcd_bl_en = port:PH07<1><0><default><1>
lcd_power_used = 0
lcd_power = port:PH08<1><0><default><1>
lcd_pwm_used = 0
lcd_pwm = port:PB02<2><0><default><default>
lcdd0 = port:PD00<2><0><default><default>
lcdd1 = port:PD01<2><0><default><default>
lcdd2 = port:PD02<2><0><default><default>
lcdd3 = port:PD03<2><0><default><default>
lcdd4 = port:PD04<2><0><default><default>
lcdd5 = port:PD05<2><0><default><default>
lcdd6 = port:PD06<2><0><default><default>
lcdd7 = port:PD07<2><0><default><default>
lcdd8 = port:PD08<2><0><default><default>
lcdd9 = port:PD09<2><0><default><default>
lcdd10 = port:PD10<2><0><default><default>
lcdd11 = port:PD11<2><0><default><default>
lcdd12 = port:PD12<2><0><default><default>
lcdd13 = port:PD13<2><0><default><default>
lcdd14 = port:PD14<2><0><default><default>
lcdd15 = port:PD15<2><0><default><default>
lcdd16 = port:PD16<2><0><default><default>
lcdd17 = port:PD17<2><0><default><default>
lcdd18 = port:PD18<2><0><default><default>
lcdd19 = port:PD19<2><0><default><default>
lcdd20 = port:PD20<2><0><default><default>
lcdd21 = port:PD21<2><0><default><default>
lcdd22 = port:PD22<2><0><default><default>
lcdd23 = port:PD23<2><0><default><default>
lcdclk = port:PD24<2><0><default><default>
lcdde = port:PD25<2><0><default><default>
lcdhsync = port:PD26<2><0><default><default>
lcdvsync = port:PD27<2><0><default><default>


EDIT: apparently I can at least check the HSync and VSync signals with my scope. It seems that my fex values are not used by the OS. The VSync frequency stays 50Hz, irrespective of the settings in FEX...

EDIT2: I noticed the frequency and polarity of the VSync signal changes during boot. It starts out with negative polarity (it pulses to 0V) at 60Hz when in U-Boot, then switches to 90Hz for the first few seconds the kernel is loading and then it changes polarity (so now its normally 0V and the pulse goes up to 3.3V) and goes to 50Hz after about 8 seconds, when the sunxi disp driver is loaded 

Any pointers are very much appreciated.

Regards,
Marten