KiCad Shield Errors

[lucacarone]

Hi guys
I we try to use de templates of A20-LIME2  found at
https://github.com/OLIMEX/OLINUXINO/tree/master/HARDWARE/A20-OLinuXino-LIME2/A20_OLinuXino_Lime2_Rev-AA_SHIELD_TEMPLATE%20KiCAD

I try to open these files with KiCad 4.0.6 (last version of KiCad)  but I have errors,
Can anyone help me?
Regards, Luca

[soenke]

I am currently working on an updated shield template for kicad and going to check it in to the main libs. The footprint of the A20-LIME2 itself is already checked in (modules.pretty). Maybe you have to check it out from github to get it: https://github.com/KiCad/Modules.pretty

Add the A20 footprint to your pcbnew layout. You can now move the 1.27mm headers just to that positions on the backside of the shield an delete the A20-footprint afterwards. I also added the areas where you have to cut out the shield.

As soon as i finished the symbol and the shield footprint i will make an update here.

[lucacarone]

Hi soenke,
Thanks for your fast replay
I have add Modules.pretty library in my KiCad but i have the same error when i try to open escheme:

Code Select Expand

IO_ERROR: Fallito il caricamento della libreria componenti "/Users/luca/Desktop/Olimexino/A20_OLinuXino_Lime2_SHIELD_TEMPLATE_Rev-AA-cache.lib".
Errore: IO_ERROR: Questo file NON è una libreria di Eeschema!
from /Users/ansible/4.0.5/kicad-mac-packaging-4.0.0/kicad/eeschema/class_library.cpp : LoadLibrary() : line 810
from /Users/ansible/4.0.5/kicad-mac-packaging-4.0.0/kicad/eeschema/class_library.cpp : LoadAllLibraries() : line 1189

I think that there are some errors in lib file,
Regards, Luca

[soenke]

Dont use the olimex template lib. Its made with some old version of kicad and simply doesnt work.

As i said i am currently working on the symbol, i already made an PR for this and it will be added in some days. Then you can get the modules.lib from the kicad github.

If you cant wait for this, make a empty file named A20-OLinuXino-Lime2_SHIELD.lib and add this:

Code Select Expand

EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# Olinuxino_A20-LIME2-Shield-GPIO-1
#
DEF Olinuxino_A20-LIME2-Shield-GPIO-1 J 0 1 Y Y 1 F N
F0 "J" 100 1050 50 H V C CNN
F1 "Olinuxino_A20-LIME2-Shield-GPIO-1" 100 -1100 50 H V C CNN
F2 "" 1450 -950 50 H I C CNN
F3 "" 1450 -950 50 H I C CNN
$FPLIST
Socket_Strip_Straight_2X20*1.27*
$ENDFPLIST
DRAW
S 1450 1000 -1250 -1000 0 1 0 N
X GND 1 1600 950 150 L 50 50 1 1 w
X +5V 2 -1400 950 150 R 50 50 1 1 w
X GNDA 3 1600 850 150 L 50 50 1 1 w
X 3.3V 4 -1400 850 150 R 50 50 1 1 w
X LRADC0 5 1600 750 150 L 50 50 1 1 P
X TS1_CLK/CSI1_PCLK/SDC1_CMD/PG0 6 -1400 750 150 R 50 50 1 1 B
X LRADC1 7 1600 650 150 L 50 50 1 1 P
X TS1_ERR/CSI1_MLCK/SDC1_CLK/PG1 8 -1400 650 150 R 50 50 1 1 P
X MICIN1 9 1600 550 150 L 50 50 1 1 P
X TS1_SYNC/CSI1_HSYNC/SDC1_D0/PG2 10 -1400 550 150 R 50 50 1 1 P
X TS1_D3/CSI1_D3/UART3_RX/CSI0_D11/PG7 20 -1400 50 150 R 50 50 1 1 P
X NCE1/PC3/SATA-PWR-EN 30 -1400 -450 150 R 50 50 1 1 P
X EINT15/NCE7/SPI2_MISO/PC22 40 -1400 -950 150 R 50 50 1 1 P
X VMIC 11 1600 450 150 L 50 50 1 1 P
X TVOUT1/VGA-B 21 1600 -50 150 L 50 50 1 1 P
X TWI2_SCK/PB20 31 1600 -550 150 L 50 50 1 1 P
X TS1_DVLD/CSI1_VSYNC/SDC1_D1/PG3 12 -1400 450 150 R 50 50 1 1 P
X TS1_D4/CSI1_D4/UART3_RTS/CSI0_D12/PG8 22 -1400 -50 150 R 50 50 1 1 P
X NCE3/PC18 32 -1400 -550 150 R 50 50 1 1 P
X HPOUTL 13 1600 350 150 L 50 50 1 1 P
X TVOUT2/VGA-R 23 1600 -150 150 L 50 50 1 1 P
X TWI1_SDA/PB19 33 1600 -650 150 L 50 50 1 1 P
X TS1_D0/CSI1_D0/SDC1_D2/CSI0_D8/PG4 14 -1400 350 150 R 50 50 1 1 P
X TS1_D5/CSI1_D5/UART3_CTS/CSI0_D13/PG9 24 -1400 -150 150 R 50 50 1 1 P
X EINT12/NCE4/SPI2_CS0/PC19 34 -1400 -650 150 R 50 50 1 1 P
X HPCOM/HPCOMFB 15 1600 250 150 L 50 50 1 1 P
X UART0_RX/IR1_RX/PB23 25 1600 -250 150 L 50 50 1 1 P
X TWI1_SCK/PB18 35 1600 -750 150 L 50 50 1 1 P
X TS1_D1/CSI1_D1/SDC1_D3/CSI0_D9/PG5 16 -1400 250 150 R 50 50 1 1 P
X TS1_D6/CSI1_D6/UART4_TX/CSI0_D14/PG10 26 -1400 -250 150 R 50 50 1 1 P
X EINT13/NCE5/SPI2_CLK/PC20 36 -1400 -750 150 R 50 50 1 1 P
X HPOUTR 17 1600 150 150 L 50 50 1 1 P
X UART0_TX/IR1_TX/PB22 27 1600 -350 150 L 50 50 1 1 P
X NDQS/PC24 37 1600 -850 150 L 50 50 1 1 P
X TS1_D2/CSI1_D2/UART3_TX/CSI0_D10/PG6 18 -1400 150 150 R 50 50 1 1 P
X TS1_D7/CSI1_D7/UART4_RX/CSI0_D15/PG11 28 -1400 -350 150 R 50 50 1 1 P
X EINT14/NCE6/SPI2_MOSI/PC21 38 -1400 -850 150 R 50 50 1 1 P
X TVOUT0/VGA-G 19 1600 50 150 L 50 50 1 1 P
X TWI2_SDA/PB21 29 1600 -450 150 L 50 50 1 1 P
X SPI0_CS0/PC23 39 1600 -950 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Olinuxino_A20-LIME2-Shield-GPIO-2
#
DEF Olinuxino_A20-LIME2-Shield-GPIO-2 J 0 1 Y Y 1 F N
F0 "J" 0 1050 50 H V C CNN
F1 "Olinuxino_A20-LIME2-Shield-GPIO-2" 50 -1100 50 H V C CNN
F2 "" 1650 -950 50 H I C CNN
F3 "" 1650 -950 50 H I C CNN
$FPLIST
Socket_Strip_Straight_2X20*1.27*
$ENDFPLIST
DRAW
S -1550 1000 1550 -1000 0 1 0 N
X GND 1 1700 950 150 L 50 50 1 1 P
X +5V 2 -1700 950 150 R 50 50 1 1 w
X LDO3_2.8V/VCC_CSI0 3 1700 850 150 L 50 50 1 1 P
X 3.3V 4 -1700 850 150 R 50 50 1 1 P
X TS0_CLK/CSI0_PCLK/PE0 5 1700 750 150 L 50 50 1 1 P
X TWI0_SCK/PB0 6 -1700 750 150 R 50 50 1 1 P
X TS0_ERR/CSI0_MCLK/PE1 7 1700 650 150 L 50 50 1 1 P
X TWI0_SDA/PB1 8 -1700 650 150 R 50 50 1 1 P
X TS0_SYNC/CSI0_HSYNC/PE2 9 1700 550 150 L 50 50 1 1 P
X GPS_CLK/PI0 10 -1700 550 150 R 50 50 1 1 P
X SDC3_CLK/PI5 20 -1700 50 150 R 50 50 1 1 P
X SPI0_CS0/UART5_TX/EINT22/PI10 30 -1700 -450 150 R 50 50 1 1 P
X PS2_SDA1/TCLKIN1/EINT27/SPI1_CS1/PI15 40 -1700 -950 150 R 50 50 1 1 P
X TS0_DVLD/CSI0_VSYNC/PE3 11 1700 450 150 L 50 50 1 1 P
X TS0_D4/CSI0_D4/PE8 21 1700 -50 150 L 50 50 1 1 P
X HSCL/UART7_TX/PS2_SCK0/PI20 31 1700 -550 150 L 50 50 1 1 P
X GPS_SIGN/PI1 12 -1700 450 150 R 50 50 1 1 P
X SDC3_D0/PI6 22 -1700 -50 150 R 50 50 1 1 P
X SPI0_CLK/UART5_RX/EINT23/PI11 32 -1700 -550 150 R 50 50 1 1 P
X TS0_D0/CSI0_D0/PE4 13 1700 350 150 L 50 50 1 1 P
X TS0_D5/CSI0_D5/PE9 23 1700 -150 150 L 50 50 1 1 P
X EINT31/SPI1_MISO/UART2_RX/PI19 33 1700 -650 150 L 50 50 1 1 P
X GPS_MAG/PI2 14 -1700 350 150 R 50 50 1 1 P
X SDC3_D1/PI7 24 -1700 -150 150 R 50 50 1 1 P
X SPI0_MOSI/UART6_TX/EINT24/PI12 34 -1700 -650 150 R 50 50 1 1 P
X TS0_D1/CSI0_D1/PE5 15 1700 250 150 L 50 50 1 1 P
X TS0_D6/CSI0_D6/PE10 25 1700 -250 150 L 50 50 1 1 P
X EINT30/SPI1_MOSI/UART2_TX/PI18 35 1700 -750 150 L 50 50 1 1 P
X PWM1/PI3 16 -1700 250 150 R 50 50 1 1 P
X SDC3_D2/PI8 26 -1700 -250 150 R 50 50 1 1 P
X SPI0_MISO/UART6_RX/EINT25/PI13 36 -1700 -750 150 R 50 50 1 1 P
X TS0_D2/CSI0_D2/PE6 17 1700 150 150 L 50 50 1 1 P
X TS0_D7/CSI0_D7/PE11 27 1700 -350 150 L 50 50 1 1 P
X EINT29/SPI1_CLK/UART2_CTS/PI17 37 1700 -850 150 L 50 50 1 1 P
X SDC3_CMD/PI4 18 -1700 150 150 R 50 50 1 1 P
X SDC3_D3/PI9 28 -1700 -350 150 R 50 50 1 1 P
X PS2_SCK1/TCLKIN0/EINT26/SPI0_CS1/PI14 38 -1700 -850 150 R 50 50 1 1 P
X TS0_D3/CSI0_D3/PE7 19 1700 50 150 L 50 50 1 1 P
X HSDA/UART7_RX/PS2_SDA0/PI21 29 1700 -450 150 L 50 50 1 1 P
X EINT28/SPI1_CS0/UART2_RTS/PI16 39 1700 -950 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Olinuxino_A20-LIME2-Shield-GPIO-3
#
DEF Olinuxino_A20-LIME2-Shield-GPIO-3 J 0 1 Y Y 1 F N
F0 "J" 0 1050 50 H V C CNN
F1 "Olinuxino_A20-LIME2-Shield-GPIO-3" 50 -1100 50 H V C CNN
F2 "" 1650 -950 50 H I C CNN
F3 "" 1650 -950 50 H I C CNN
$FPLIST
Socket_Strip_Straight_2X20*1.27*
$ENDFPLIST
DRAW
S -2550 1000 2550 -1000 0 1 0 N
X GND 1 2700 950 150 L 50 50 1 1 w
X +5V 2 -2700 950 150 R 50 50 1 1 w
X IR0_TX/SPDIF_MCLK/STANBYWFI/PB3 3 2700 850 150 L 50 50 1 1 P
X 3.3V 4 -2700 850 150 R 50 50 1 1 w
X IR0_RX/PB4 5 2700 750 150 L 50 50 1 1 P
X RESET_N 6 -2700 750 150 R 50 50 1 1 P
X I2S_MCLK/AC97_MCLK/PB5 7 2700 650 150 L 50 50 1 1 P
X LCD1_D0/ATAA0/UART3_TX/EINT0/CSI1_D0/PH0 8 -2700 650 150 R 50 50 1 1 P
X I2S_BCLK/AC97_BCLK/PB6 9 2700 550 150 L 50 50 1 1 P
X LCD1_D7/ATAD3/UART5_RX/MS_CLK/EINT7/CSI1_D7/PH7/I2S_DO1/PB9/USB0-DRV 10 -2700 550 150 R 50 50 1 1 P
X LCD1_D13/ATAD9/PS2_SDA1/SMC_RST/EINT13/CSI1_D13/PH13 20 -2700 50 150 R 50 50 1 1 P
X ERXCK/LCD1_D18/ATAD14/KP_OUT0/SMC_SLK/EINT18/CSI1_D18/PH18 30 -2700 -450 150 R 50 50 1 1 P
X ETEN/LCD1_D23/ATACS0/KP_OUT3/SDC1_CLK/CSI1_D23/PH23 40 -2700 -950 150 R 50 50 1 1 P
X I2S_LRCK/AC97_SYNC/PB7 11 2700 450 150 L 50 50 1 1 P
X I2S_DI/AC97_DI/SPDIF_DI/PB12 21 2700 -50 150 L 50 50 1 1 P
X JTAG_DI0/SPI2_MISO/PB17 31 2700 -550 150 L 50 50 1 1 P
X ERXD2/LCD1_D9/ATAD5/KP_IN1/MS_D1/EINT9/CSI1_D9/PH9 12 -2700 450 150 R 50 50 1 1 P
X ETXD3/LCD1_D14/ATAD10/KP_IN4/SMC_VPPEN/EINT14/CSI1_D14/PH14 22 -2700 -50 150 R 50 50 1 1 P
X ERXERR/LCD1_D19/ATAD15/KP_OUT1/SMC_SDA/EINT19/CSI1_D19/PH19 32 -2700 -550 150 R 50 50 1 1 P
X I2S_DO0/AC97_DO/PB8/SATA-PWR-EN 13 2700 350 150 L 50 50 1 1 P
X SPI2_CS1/SPDIF_DO/PB13 23 2700 -150 150 L 50 50 1 1 P
X ETXCK/LCD1_CLK/ATACS1/KP_OUT4/SDC1_D0/CSI1_PCLK/PH24 33 2700 -650 150 L 50 50 1 1 P
X ERXD1/LCD1_D10/ATAD6/KP_IN2/MS_D2/EINT10/CSI1_D10/PH10 14 -2700 350 150 R 50 50 1 1 P
X ETXD2/LCD1_D15/ATAD11/KP_IN5/SMC_VPPPP/EINT15/CSI1_D15/PH15 24 -2700 -150 150 R 50 50 1 1 P
X ERXDV/LCD1_D20/ATAOE/CAN_TX/EINT20/CSI1_D20/PH20 34 -2700 -650 150 R 50 50 1 1 P
X I2S_DO1/PB9 15 2700 250 150 L 50 50 1 1 P
X JTAG_MS0/SPI2_CS0/PB14 25 2700 -250 150 L 50 50 1 1 P
X ECRS/LCD1_DE/ATAIORDY/KP_OUT5/SDC1_D1/CSI1_FIELD/PH25 35 2700 -750 150 L 50 50 1 1 P
X ERXD0/LCD1_D11/ATAD7/KP_IN3/MS_D3/EINT11/CSI1_D11/PH11 16 -2700 250 150 R 50 50 1 1 P
X ETXD1/LCD1_D16/ATAD12/KP_IN6/SMC_DET/EINT16/CSI1_D16/PH16 26 -2700 -250 150 R 50 50 1 1 P
X EMDC/LCD1_D21/ATADREQ/CAN_RX/EINT21/CSI1_D21/PH21 36 -2700 -750 150 R 50 50 1 1 P
X I2S_DO2/PB10 17 2700 150 150 L 50 50 1 1 P
X JTAG_CK0/SPI2_CLK/PB15 27 2700 -350 150 L 50 50 1 1 P
X ECOL/LCD1_HSYNC/ATAIOR/KP_OUT6/SDC1_D2/CSI1_HSYNC/PH26 37 2700 -850 150 L 50 50 1 1 P
X LCD1_D12/ATAD8/PS2_SCK1/EINT12/CSI1_D12/PH12 18 -2700 150 150 R 50 50 1 1 P
X ETXD0/LCD1_D17/ATAD13/KP_IN7/SMC_VCCEN/EINT17/CSI1_D17/PH17 28 -2700 -350 150 R 50 50 1 1 P
X EMDIO/LCD1_D22/ATADACK/KP_OUT2/SDC1_CMD/CSI1_D22/PH22 38 -2700 -850 150 R 50 50 1 1 P
X I2S_DO3/PB11 19 2700 50 150 L 50 50 1 1 P
X JTAG_DO0/SPI2_MOSI/PB16 29 2700 -450 150 L 50 50 1 1 P
X ETXERR/LCD1_VSYNC/ATAIOW/KP_OUT7/SDC1_D3/CSI1_VSYNC/PH27 39 2700 -950 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Olinuxino_A20-LIME2-Shield-GPIO-4
#
DEF Olinuxino_A20-LIME2-Shield-GPIO-4 J 0 1 Y Y 1 F N
F0 "J" -50 550 50 H V C CNN
F1 "Olinuxino_A20-LIME2-Shield-GPIO-4" 0 -600 50 H V C CNN
F2 "" 1650 -950 50 H I C CNN
F3 "" 1650 -950 50 H I C CNN
$FPLIST
Socket_Strip_Straight_2X10*1.27*
$ENDFPLIST
DRAW
S -1350 500 1350 -500 0 1 0 N
X GND 1 1500 450 150 L 50 50 1 1 P
X +5V 2 -1500 450 150 R 50 50 1 1 w
X NMI_N 3 1500 350 150 L 50 50 1 1 P
X TVOUT3 4 -1500 350 150 R 50 50 1 1 P
X MIC1OUTP 5 1500 250 150 L 50 50 1 1 P
X TVIN0 6 -1500 250 150 R 50 50 1 1 P
X MIC1OUTN 7 1500 150 150 L 50 50 1 1 P
X TVIN1 8 -1500 150 150 R 50 50 1 1 P
X MICIN2 9 1500 50 150 L 50 50 1 1 P
X TVIN2 10 -1500 50 150 R 50 50 1 1 P
X FMINL 20 -1500 -450 150 R 50 50 1 1 P
X GNULL/ERXERR/I²S1_MCLK/ERXERR/SPI3_CS1/PA9 11 1500 -50 150 L 50 50 1 1 P
X TVIN3 12 -1500 -50 150 R 50 50 1 1 P
X GNULL/ETXCK/I²S1_BCLK/ETXCK/UART7_TX/UART1_DTR/PA14 13 1500 -150 150 L 50 50 1 1 P
X LINEINR 14 -1500 -150 150 R 50 50 1 1 P
X NRB1/SDC2_CLK/PC7 15 1500 -250 150 L 50 50 1 1 P
X LINEINL 16 -1500 -250 150 R 50 50 1 1 P
X NWP/PC16 17 1500 -350 150 L 50 50 1 1 P
X FMINR 18 -1500 -350 150 R 50 50 1 1 P
X NCE2/PC17 19 1500 -450 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Olinuxino_A20-LIME2-Shield-LCD
#
DEF Olinuxino_A20-LIME2-Shield-LCD J 0 1 Y Y 1 F N
F0 "J" 0 1050 50 H V C CNN
F1 "Olinuxino_A20-LIME2-Shield-LCD" 0 0 50 V V C CNN
F2 "" 1650 -950 50 H I C CNN
F3 "" 1650 -950 50 H I C CNN
$FPLIST
Socket_Strip_Straight_2X20*1.27*
$ENDFPLIST
DRAW
S -2350 1000 2350 -1000 0 1 0 N
X GND 1 2500 950 150 L 50 50 1 1 P
X +5V 2 -2500 950 150 R 50 50 1 1 w
X GND 3 2500 850 150 L 50 50 1 1 P
X 3.3V 4 -2500 850 150 R 50 50 1 1 P
X LCD0_D17/LVDS1_VNC/PD17 5 2500 750 150 L 50 50 1 1 P
X LCD0_D16/LVDS1_VPC/PD16 6 -2500 750 150 R 50 50 1 1 P
X LCD0_D19/LVDS1_VN3/PD19 7 2500 650 150 L 50 50 1 1 P
X LCD0_D18/LVDS1_VP3/PD18 8 -2500 650 150 R 50 50 1 1 P
X LCD0_D21/SMC_VPPEN/PD21 9 2500 550 150 L 50 50 1 1 P
X LCD0_D20/CSI1_MCLK/PD20 10 -2500 550 150 R 50 50 1 1 P
X LCD0_D14/LVDS1_VP2/PD14 20 -2500 50 150 R 50 50 1 1 P
X LCD0_HSYNC/SMC_SLK/PD26 30 -2500 -450 150 R 50 50 1 1 P
X YP_TP 40 -2500 -950 150 R 50 50 1 1 P
X LCD0_D23/SMC_DET/PD23 11 2500 450 150 L 50 50 1 1 P
X LCD0_D1/LVDS0_VN0/PD1 21 2500 -50 150 L 50 50 1 1 P
X LCD0_DE/SMC_RST/PD25 31 2500 -550 150 L 50 50 1 1 P
X LCD0_D22/SMC_VPPPP/PD22 12 -2500 450 150 R 50 50 1 1 P
X LCD0_D0/LVDS0_VP0/PD0 22 -2500 -50 150 R 50 50 1 1 P
X LCD0_CLK/SMC_VCCEN/PD24 32 -2500 -550 150 R 50 50 1 1 P
X LCD0_D9/LVDS0_VN3/PD9 13 2500 350 150 L 50 50 1 1 P
X LCD0_D3/LVDS0_VN1/PD3 23 2500 -150 150 L 50 50 1 1 P
X NC/IR0_RX/PB4 33 2500 -650 150 L 50 50 1 1 P
X LCD0_D8/LVDS0_VP3/PD8 14 -2500 350 150 R 50 50 1 1 P
X LCD0_D2/LVDS0_VP1/PD2 24 -2500 -150 150 R 50 50 1 1 P
X NC/IR0_TX/SPDIF_MCLK/STANBYWFI/PB3 34 -2500 -650 150 R 50 50 1 1 P
X LCD0_D11/LVDS1_VN0/PD11 15 2500 250 150 L 50 50 1 1 P
X LCD0_D5/LVDS0_VN2/PD5 25 2500 -250 150 L 50 50 1 1 P
X PB2/PWM0 35 2500 -750 150 L 50 50 1 1 P
X LCD0_D10/LVDS1_VP0/PD10 16 -2500 250 150 R 50 50 1 1 P
X LCD0_D4/LVDS0_VP2/PD4 26 -2500 -250 150 R 50 50 1 1 P
X ERXD3/LCD1_D8/ATAD4/KP_IN0/MS_D0/EINT8/CSI1_D8/PH8 36 -2500 -750 150 R 50 50 1 1 P
X LCD0_D13/LVDS1_VN1/PD13 17 2500 150 150 L 50 50 1 1 P
X LCD0_D7/LVDS0_VNC/PD7 27 2500 -350 150 L 50 50 1 1 P
X XN_TP 37 2500 -850 150 L 50 50 1 1 P
X LCD0_D12/LVDS1_VP1/PD12 18 -2500 150 150 R 50 50 1 1 P
X LCD0_D6/LVDS0_VPC/PD6 28 -2500 -350 150 R 50 50 1 1 P
X XP_TP 38 -2500 -850 150 R 50 50 1 1 P
X LCD0_D15/LVDS1_VN2/PD15 19 2500 50 150 L 50 50 1 1 P
X LCD0_VSYNC/SMC_SDA/PD27 29 2500 -450 150 L 50 50 1 1 P
X YN_TP 39 2500 -950 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
#End Library


And another file named A20-OLinuXino-Lime2_SHIELD.dcm and add this:

Code Select Expand

EESchema-DOCLIB  Version 2.0
#
$CMP Olinuxino_A20-LIME2-Shield-GPIO-1
D Olinuxino A20 GPIO-1 Shield connector
K A20 GPIO-1
F https://github.com/OLIMEX/OLINUXINO/tree/master/HARDWARE/A20-OLinuXino-LIME2
$ENDCMP
#
$CMP Olinuxino_A20-LIME2-Shield-GPIO-2
D Olinuxino A20 GPIO-2 Shield connector
K A20 GPIO-2
F https://github.com/OLIMEX/OLINUXINO/tree/master/HARDWARE/A20-OLinuXino-LIME2
$ENDCMP
#
$CMP Olinuxino_A20-LIME2-Shield-GPIO-3
D Olinuxino A20 GPIO-3 Shield connector
K A20 GPIO-3
F https://github.com/OLIMEX/OLINUXINO/tree/master/HARDWARE/A20-OLinuXino-LIME2
$ENDCMP
#
$CMP Olinuxino_A20-LIME2-Shield-GPIO-4
D Olinuxino A20 GPIO-4 Shield connector
K A20 GPIO-4
F https://github.com/OLIMEX/OLINUXINO/tree/master/HARDWARE/A20-OLinuXino-LIME2
$ENDCMP
#
$CMP Olinuxino_A20-LIME2-Shield-LCD
D Olinuxino A20 GPIO-LCD Shield connector
K A20 GPIO-LCD
F https://github.com/OLIMEX/OLINUXINO/tree/master/HARDWARE/A20-OLinuXino-LIME2
$ENDCMP
#
#End Doc Library


footprints: Use the 2x20 1.27mm pin headers for gpio1-3 and lcd and 2x10 1.27mm for gpio4

Add the A20 footprint from github manually as footprint to your pcbnew on the front side.

Then read the netlist and move the 1.27mm headers to the positions on the back side.

Now you can delete the A20 footprint again, which you only used as positioning help.

But be aware that there will be some changes in the final official lib.

[lucacarone]

HI soenke,
Thanks for your fast replay.
Thanks to your help, I found the error.
This is wrong:
I downloaded the github file incorrectly. I clicked with the right button and I saved the destination with the name.
I opened the file with a text editor and found the gitub html text in the file.
That's right:
You have to go to the link:
Https://github.com/OLIMEX/OLINUXINO
And you must clone or download everything.
go in folder, in your pc: /HARDWARE/A20-OLinuXino-LIME2/A20_OLinuXino_Lime2_Rev-AA_SHIELD_TEMPLATE KiCAD/
and you can open with last versione of KiCAD, without errors.
Regards, Luca

[soenke]

Yes, i imported that as well some time ago. The problem is, that you dont have the signal names in the symbol, the cutouts for the cpu heatsink and HDMI connector are missing and the connector numberings are mirrored. The silkscreen is printed over the SMD pads and the centering holes for the sockets are missing.