eMMC speed

[lambda]

Hi,

I did some tests with the read speed of the teres:
(dd if=/dev/mmcblk2 of=/dev/null bs=16k count=1024 skip=10000)

On mainline (kernel 4.20 from debian experimental) I get around 55MB/s
On olimex image I get around 18MB/s

Both values seem to be quite slow to me. According to data sheet the
eMMC should be able to do 160MB/s in HS200 mode and 250MB/s in HS400
mode.

Question to Olimex: What's the fastest mode supported by the PCB
routing?

Question to all: Anybody knows how to enable faster modes in the
kernel?

TIA,
Harald

[LubOlimex]

In the Teres-I we don't have the data strobe of the eMMC routed at all. Neither HS200, nor HS400 are possible. The 50MB/s result is surprisingly good.

In next hardware revision we would place the newer eMMC memories that are capable of higher speeds.

[khumarahn]

May it be possible to upgrade the eMMC chip on existing boards?

[LubOlimex]

Newer eMMC chips are not pin-to-pin compatible with older ones, unfortunately. So changing just the eMMC would not be possible. But older eMMC 4.x are harder and harder to find. We have to make the change to eMMC 5.x for the Teres-I at some point, the same way we did for the rest of our Linux-enabled products.

[lambda]

Thanks for the answer. If you say 50MB/s is pretty good, I will take your word for it. (IIRC there are fast modes other then HS200/HS400, but I don't know enough about emmc protocols to know if any of them would be viable with the current routing.)

Just looked at the schematics again and see that data strobe pin is used for SPI on the currently unused connector (USB0-OTG, uart2, spi0, i2c1). I guess having extra interfaces is worth some sacrifice in eMMC speed. However I wonder: Do you have any estimate when the extension hardware using this connector will become avilable?

I'd happily drill a extra hole in my laptop case to get usb-otg and a uart on the teres. They would come in handy for me quite often for debugging other hardware in the field.