Xenomai for A13 - A10

[uMinded]

On the upside from the log it is loading the required xenomai kernel level stuff and the ipipe is registered and loaded with the correct timer2 clock frequency.

The kernel does not compile with a specific log level, you can enable what things dump printk() messages but the boot loader controls the overall kernel verboseness. I will re-compile with maximum debugging enabled on the xenomai stuff though.

Code Select Expand

Create a file on your SDCard with script.bin called uEnv.txt:
setenv panicarg 'panic=10'
setenv extra 'debug ignore_loglevel'
setenv setargs 'setenv bootargs ${panicarg} ${extra}'


I have no idea if thaw will work or if script.bin will overwrite these values but I see uBoot does look for it.


EDIT:

Slag that, under `Boot Options` you can put in a default boot string. I am building a debug kernel now. I would love to know if the above works though as it would allow for easy dual booting!

[uMinded]

New Kernel

Please try the uImage-debug (rename to uImage) and also unzip the modules archive to /lib/modules please. I do not see anything that Xenomai uses but it will take any questions out of it.

Also the next log is going to be VERY long if it boots, sometimes the print buffer can overfill before it can be dumped to the console...

Thanks for the help guys, I am going to order my board from digikey on Wensday so I will have it for next weekend!

[ehj666]

New Kernel

Please try the uImage-debug (rename to uImage) and also unzip the modules archive to /lib/modules please. I do not see anything that Xenomai uses but it will take any questions out of it.

Also the next log is going to be VERY long if it boots, sometimes the print buffer can overfill before it can be dumped to the console...

Thanks for the help guys, I am going to order my board from digikey on Wensday so I will have it for next weekend!

If it is not too late, call your order in to Digikey and ask to speak with Rick Woodruff. He is aware of the problem with the SD port. See if there is any way they can test the SD port. All they should need is to power it via USB, connect a monitor and have a formatted SD card. Boot to Android, then my experience is that if the card can be read by Android it should boot. If Android cannot read it, it will report "Damaged SD".

Here is the latest boot log. Still not a lot to go on as far as I can tell.

Code Select Expand


U-Boot SPL 2012.10-04268-gf925eea (Feb 05 2013 - 19:19:54)
DRAM: 512MB
SUNXI SD/MMC: 0


U-Boot 2012.10-04268-gf925eea (Feb 05 2013 - 19:19:54) Allwinner Technology

CPU:   SUNXI Family
Board: A13-OLinuXino
I2C:   ready
DRAM:  512 MiB
MMC:   SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Hit any key to stop autoboot:  3 reading uEnv.txt

** Unable to read "uEnv.txt" from mmc 0:1 **
Loading file "uEnv.txt" from mmc device 0:1
Failed to mount ext2 filesystem...
** Bad ext2 partition or disk - mmc 0:1 **
ext2load - load binary file from a Ext2 filesystem

Usage:
ext2load <interface> <dev[:part]> [addr] [filename] [bytes]
    - load binary file 'filename' from 'dev' on 'interface'
      to address 'addr' from ext2 filesystem
Loading file "boot/uEnv.txt" from mmc device 0:1
Failed to mount ext2 filesystem...
** Bad ext2 partition or disk - mmc 0:1 **
ext2load - load binary file from a Ext2 filesystem

Usage:
ext2load <interface> <dev[:part]> [addr] [filename] [bytes]
    - load binary file 'filename' from 'dev' on 'interface'
      to address 'addr' from ext2 filesystem
reading boot.scr

** Unable to read "boot.scr" from mmc 0:1 **
Loading file "boot.scr" from mmc device 0:1
Failed to mount ext2 filesystem...
** Bad ext2 partition or disk - mmc 0:1 **
ext2load - load binary file from a Ext2 filesystem

Usage:
ext2load <interface> <dev[:part]> [addr] [filename] [bytes]
    - load binary file 'filename' from 'dev' on 'interface'
      to address 'addr' from ext2 filesystem
Loading file "boot/boot.scr" from mmc device 0:1
Failed to mount ext2 filesystem...
** Bad ext2 partition or disk - mmc 0:1 **
ext2load - load binary file from a Ext2 filesystem

Usage:
ext2load <interface> <dev[:part]> [addr] [filename] [bytes]
    - load binary file 'filename' from 'dev' on 'interface'
      to address 'addr' from ext2 filesystem
reading script.bin

28156 bytes read
reading uImage

4229908 bytes read
## Booting kernel from Legacy Image at 48000000 ...
   Image Name:   Linux-3.0.36-r1-xeno-debug+
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    4229844 Bytes = 4 MiB
   Load Address: 40008000
   Entry Point:  40008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
OK

Starting kernel ...

<6>Initializing cgroup subsys cpuset
<5>Linux version 3.0.36-r1-xeno-debug+ (uminded@uminded-desktop) (gcc version 4.6.3 (Ubuntu/Linaro 4.6.3-1ubuntu5) ) #17 PREEMPT Mon Feb 18 10:43:44 CST 2013
CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387
CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine: sun5i
DRAM: 512<6>Total Detected Memory: 512MB with 1 banks
<4>Ignoring unrecognised tag 0x00000000
<6>Memory Reserved(in bytes):
<6> LCD: 0x5a000000, 0x02000000
<6> SYS: 0x43000000, 0x00010000
<6> G2D: 0x58000000, 0x01000000
<6> VE : 0x44000000, 0x05000000
Memory policy: ECC disabled, Data cache writeback
<7>On node 0 totalpages: 114688
<7>free_area_init_node: node 0, pgdat c083a5a8, node_mem_map c0a86000
<7>  Normal zone: 896 pages used for memmap
<7>  Normal zone: 0 pages reserved
<7>  Normal zone: 113792 pages, LIFO batch:31
<7>pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
<7>pcpu-alloc: [0] 0
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 113792
<5>Kernel command line: console=ttyS0,115200 root=/dev/mmcblk0p2 rootwait loglevel=8 panic=10
<6>PID hash table entries: 2048 (order: 1, 8192 bytes)
<6>Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
<6>Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
<6>Memory: 448MB = 448MB total
<5>Memory: 329196k/329196k available, 129556k reserved, 0K highmem
<5>Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
    DMA     : 0xffc00000 - 0xffe00000   (   2 MB)
    vmalloc : 0xdc800000 - 0xf0000000   ( 312 MB)
    lowmem  : 0xc0000000 - 0xdc000000   ( 448 MB)
    pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
    modules : 0xbf000000 - 0xbfe00000   (  14 MB)
      .init : 0xc0008000 - 0xc0033000   ( 172 kB)
      .text : 0xc0033000 - 0xc07fb000   (7968 kB)
      .data : 0xc07fc000 - 0xc083fdf8   ( 272 kB)
       .bss : 0xc083fe1c - 0xc0a853c0   (2326 kB)
<6>SLUB: Genslabs=11, HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
<6>NR_IRQS:96 nr_irqs:96 96
<6>timer0: Periodic Mode
<6>I-pipe 1.18-11: pipeline enabled.
<6>Console: colour dummy device 80x30
<3>ram_console: buffer   (null), invalid size 0, datasize 4294967284
<6>Calibrating delay loop... <c>1001.88 BogoMIPS (lpj=5009408)
<6>pid_max: default: 32768 minimum: 301
<6>Mount-cache hash table entries: 512
<6>Initializing cgroup subsys cpuacct
<6>Initializing cgroup subsys devices
<6>Initializing cgroup subsys freezer
<6>Initializing cgroup subsys blkio
<6>CPU: Testing write buffer coherency: ok
<6>hw perfevents: enabled with ARMv7 Cortex-A8 PMU driver, 5 counters available
<6>devtmpfs: initialized
<6>print_constraints: dummy:
<6>NET: Registered protocol family 16
<6>hw-breakpoint: debug architecture 0x4 unsupported.
<6>I-pipe, 300.000 MHz clocksource
SOFTWINNER DMA Driver, (c) 2003-2004,2006 Simtec Electronics
<6>Initialize DMAC OK
<6>bio: create slab <bio-0> at 0
<5>SCSI subsystem initialized
<6>usbcore: registered new interface driver usbfs
<6>usbcore: registered new interface driver hub
<6>usbcore: registered new device driver usb
<6>Advanced Linux Sound Architecture Driver Version 1.0.24.
<6>cfg80211: Calling CRDA to update world regulatory domain
Init eGon pin module V2.0
<6>Switching to clocksource ipipe_tsc
<5>FS-Cache: Loaded
<6>CacheFiles: Loaded
<6>timer0: Oneshot Mode
[usb_manager]: CONFIG_USB_SW_SUN5I_USB0_OTG
[sw_hcd0]: usb host driver initialize........
[sw_hcd0]: [sw_hcd_host0]: open_usb_clock
[hcd0]: open, 0x60(0xc141), 0xcc(0x143)
[sw_hcd0]: host_init_state = 0
[sw_hcd0]: platform is usb host
[sw_hcd0]: sw_hcd_init_controller: sw_hcd_host0: USB Host mode controller at f1c13000 using PIO, IRQ 38
<6>sw_hcd_host0 sw_hcd_host0: sw_hcd host driver
<6>sw_hcd_host0 sw_hcd_host0: new USB bus registered, assigned bus number 1
<6>hub 1-0:1.0: USB hub found
<6>hub 1-0:1.0: 1 port detected
wrn: hcd is not enable, need not start hcd
[sw_hcd0]: sw_usb_host0_disable start
-------sw_hcd0_soft_disconnect---------
[sw_hcd_host0]: Set USB Power OFF
wrn: hcd is not enable, need not stop hcd
[sw_hcd0]: sw_usb_host0_disable end
[sw_udc]: udc_init: version 20080411
axp driver uning configuration failed(561)
axp driver uning configuration failed(573)
<6>NET: Registered protocol family 2
<6>IP route cache hash table entries: 4096 (order: 2, 16384 bytes)
<6>TCP established hash table entries: 16384 (order: 5, 131072 bytes)
<6>TCP bind hash table entries: 16384 (order: 4, 65536 bytes)
<6>TCP: Hash tables configured (established 16384 bind 16384)
<6>TCP reno registered
<6>UDP hash table entries: 256 (order: 0, 4096 bytes)
<6>UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
<6>NET: Registered protocol family 1
<6>RPC: Registered named UNIX socket transport module.
<6>RPC: Registered udp transport module.
<6>RPC: Registered tcp transport module.
<6>RPC: Registered tcp NFSv4.1 backchannel transport module.
[pm]aw_pm_init!
<6>audit: initializing netlink socket (disabled)
<5>type=2000 audit(0.150:1): initialized
<6>I-pipe: Domain Xenomai registered.
<6>Xenomai: hal/arm started.
<6>Xenomai: scheduling class idle registered.


[uMinded]

It appears that the script.bin file has kernel parameters that overrule the compiled ones,I have forced ignore kernel options from bootloader and I have added a bunch of prink() calls to my clock code as well as enabled debugging in a few source files.

Can you give this one a go? If we don't get a better output then I am going to need a board to continue as I will need to dump memory and probe with a debugger.

New Debug Kernel

[crubille]

Hello,

i get a running  xenomai on my A13. The base kernel is the sunxi3.4.24 (the dev version some says ago).

I compile and test xenomai application this evening.

[Tele]

Can you give this one a go?
New Debug Kernel

This is your last kernel:

Code Select Expand


U-Boot 2012.10-rc1-03956-gd7ea23d (Oct 11 2012 - 15:48:58) Allwinner Technology

CPU:   SUNXI Family
Board: A13-OLinuXino
I2C:   ready
DRAM:  512 MiB
MMC:   SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Hit any key to stop autoboot:  0
reading uEnv.txt

** Unable to read "uEnv.txt" from mmc 0:1 **
Loading file "uEnv.txt" from mmc device 0:1 xxa1
Failed to mount ext2 filesystem...
** Bad ext2 partition or disk - mmc 0:1 **
ext2load - load binary file from a Ext2 filesystem

Usage:
ext2load <interface> <dev[:part]> [addr] [filename] [bytes]
    - load binary file 'filename' from 'dev' on 'interface'
      to address 'addr' from ext2 filesystem
Loading file "boot/uEnv.txt" from mmc device 0:1 xxa1
Failed to mount ext2 filesystem...
** Bad ext2 partition or disk - mmc 0:1 **
ext2load - load binary file from a Ext2 filesystem

Usage:
ext2load <interface> <dev[:part]> [addr] [filename] [bytes]
    - load binary file 'filename' from 'dev' on 'interface'
      to address 'addr' from ext2 filesystem
reading boot.scr

** Unable to read "boot.scr" from mmc 0:1 **
Loading file "boot.scr" from mmc device 0:1 xxa1
Failed to mount ext2 filesystem...
** Bad ext2 partition or disk - mmc 0:1 **
ext2load - load binary file from a Ext2 filesystem

Usage:
ext2load <interface> <dev[:part]> [addr] [filename] [bytes]
    - load binary file 'filename' from 'dev' on 'interface'
      to address 'addr' from ext2 filesystem
Loading file "boot/boot.scr" from mmc device 0:1 xxa1
Failed to mount ext2 filesystem...
** Bad ext2 partition or disk - mmc 0:1 **
ext2load - load binary file from a Ext2 filesystem

Usage:
ext2load <interface> <dev[:part]> [addr] [filename] [bytes]
    - load binary file 'filename' from 'dev' on 'interface'
      to address 'addr' from ext2 filesystem
reading script.bin

28156 bytes read
reading uImage

4230664 bytes read
## Booting kernel from Legacy Image at 48000000 ...
   Image Name:   Linux-3.0.36-r1-xeno-debug+
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    4230600 Bytes = 4 MiB
   Load Address: 40008000
   Entry Point:  40008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
OK

Starting kernel ...

<6>Initializing cgroup subsys cpuset
<5>Linux version 3.0.36-r1-xeno-debug+ (uminded@uminded-desktop) (gcc version 4.6.3 (Ubuntu/Linaro 4.6.3-1ubuntu5) ) #18 PREEMPT Mon Feb 18 17:50:33 CST 2013
CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine: sun5i
DRAM: 512<6>Total Detected Memory: 512MB with 1 banks
<4>Ignoring tag cmdline (using the default kernel command line)
<4>Ignoring unrecognised tag 0x00000000
<6>debug: ignoring loglevel setting.
<6>Memory Reserved(in bytes):
<6>     LCD: 0x5a000000, 0x02000000
<6>     SYS: 0x43000000, 0x00010000
<6>     G2D: 0x58000000, 0x01000000
<6>     VE : 0x44000000, 0x05000000
Memory policy: ECC disabled, Data cache writeback
<7>On node 0 totalpages: 114688
<7>free_area_init_node: node 0, pgdat c083a5a8, node_mem_map c0a86000
<7>  Normal zone: 896 pages used for memmap
<7>  Normal zone: 0 pages reserved
<7>  Normal zone: 113792 pages, LIFO batch:31
<7>pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
<7>pcpu-alloc: [0] 0
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 113792
<5>Kernel command line: mem=448M@0x40000000 console=ttyS0,115200 panic=10 debug ignore_loglevel print_fatal_signals=1 LOGLEVEL=8
<6>PID hash table entries: 2048 (order: 1, 8192 bytes)
<6>Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
<6>Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
<6>Memory: 448MB = 448MB total
<5>Memory: 329196k/329196k available, 129556k reserved, 0K highmem
<5>Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
    DMA     : 0xffc00000 - 0xffe00000   (   2 MB)
    vmalloc : 0xdc800000 - 0xf0000000   ( 312 MB)
    lowmem  : 0xc0000000 - 0xdc000000   ( 448 MB)
    pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
    modules : 0xbf000000 - 0xbfe00000   (  14 MB)
      .init : 0xc0008000 - 0xc0033000   ( 172 kB)
      .text : 0xc0033000 - 0xc07fb000   (7968 kB)
      .data : 0xc07fc000 - 0xc083fdf8   ( 272 kB)
       .bss : 0xc083fe1c - 0xc0a853c0   (2326 kB)
<6>SLUB: Genslabs=11, HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
<6>NR_IRQS:96 nr_irqs:96 96
<6>timer0: Periodic Mode
<6>I-pipe 1.18-11: pipeline enabled.
<6>Console: colour dummy device 80x30
<3>ram_console: buffer   (null), invalid size 0, datasize 4294967284
<6>Calibrating delay loop... <c>1001.88 BogoMIPS (lpj=5009408)
<6>pid_max: default: 32768 minimum: 301
<6>Mount-cache hash table entries: 512
<6>Initializing cgroup subsys cpuacct
<6>Initializing cgroup subsys devices
<6>Initializing cgroup subsys freezer
<6>Initializing cgroup subsys blkio
<6>CPU: Testing write buffer coherency: ok
<6>hw perfevents: enabled with ARMv7 Cortex-A8 PMU driver, 5 counters available
<6>devtmpfs: initialized
<6>print_constraints: dummy:
<6>NET: Registered protocol family 16
<6>hw-breakpoint: debug architecture 0x4 unsupported.
__init timer2_clkevt_init()
[CLKSRC] set up ipipe timer2 clock event irq!
<6>I-pipe, 300.000 MHz clocksource
[CLKSRC] register ipipe timer2 clock event device!
[CLKSRC] set up all-winners clock event irq!
[CLKSRC] register all-winners clock event device!
[CLKSRC] all-winners clock source init!
[CLKSRC] register all-winners clock source!
SOFTWINNER DMA Driver, (c) 2003-2004,2006 Simtec Electronics
<6>Initialize DMAC OK
<6>bio: create slab <bio-0> at 0
<5>SCSI subsystem initialized
<6>usbcore: registered new interface driver usbfs
<6>usbcore: registered new interface driver hub
<6>usbcore: registered new device driver usb
<6>Advanced Linux Sound Architecture Driver Version 1.0.24.
Init eGon pin module V2.0
<6>cfg80211: Calling CRDA to update world regulatory domain
<6>Switching to clocksource ipipe_tsc
<5>FS-Cache: Loaded
<6>CacheFiles: Loaded
<6>timer0: Oneshot Mode
[usb_manager]: CONFIG_USB_SW_SUN5I_USB0_OTG
[sw_hcd0]: usb host driver initialize........
[sw_hcd0]: [sw_hcd_host0]: open_usb_clock
[hcd0]: open, 0x60(0xc141), 0xcc(0x143)
[sw_hcd0]: host_init_state = 0
[sw_hcd0]: platform is usb host
[sw_hcd0]: sw_hcd_init_controller: sw_hcd_host0: USB Host mode controller at f1c13000 using PIO, IRQ 38
<6>sw_hcd_host0 sw_hcd_host0: sw_hcd host driver
<6>sw_hcd_host0 sw_hcd_host0: new USB bus registered, assigned bus number 1
<6>hub 1-0:1.0: USB hub found
<6>hub 1-0:1.0: 1 port detected
wrn: hcd is not enable, need not start hcd
[sw_hcd0]: sw_usb_host0_disable start
-------sw_hcd0_soft_disconnect---------
[sw_hcd_host0]: Set USB Power OFF
wrn: hcd is not enable, need not stop hcd
[sw_hcd0]: sw_usb_host0_disable end
[sw_udc]: udc_init: version 20080411
axp driver uning configuration failed(561)
axp driver uning configuration failed(573)
<6>NET: Registered protocol family 2
<6>IP route cache hash table entries: 4096 (order: 2, 16384 bytes)
<6>TCP established hash table entries: 16384 (order: 5, 131072 bytes)
<6>TCP bind hash table entries: 16384 (order: 4, 65536 bytes)
<6>TCP: Hash tables configured (established 16384 bind 16384)
<6>TCP reno registered
<6>UDP hash table entries: 256 (order: 0, 4096 bytes)
<6>UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
<6>NET: Registered protocol family 1
<6>RPC: Registered named UNIX socket transport module.
<6>RPC: Registered udp transport module.
<6>RPC: Registered tcp transport module.
<6>RPC: Registered tcp NFSv4.1 backchannel transport module.
[pm]aw_pm_init!
<6>audit: initializing netlink socket (disabled)
<5>type=2000 audit(0.190:1): initialized
<6>I-pipe: Domain Xenomai registered.
<6>Xenomai: hal/arm started.
__ipipe_mach_set_dec()
timer2_set_next_clkevt()
[CLKSRC] timer2_set_next_clkevt: 4294966295
__ipipe_mach_set_dec()
timer2_set_next_clkevt()
[CLKSRC] timer2_set_next_clkevt: 4294966295


This is your last kernel with uExt.txt (almost the same):

Code Select Expand


U-Boot SPL 2012.10-rc1-03956-gd7ea23d (Oct 11 2012 - 15:48:58)
MMC:   SUNXI SD/MMC: 0
Loading U-Boot...   OK!
Jumping to U-Boot...


U-Boot 2012.10-rc1-03956-gd7ea23d (Oct 11 2012 - 15:48:58) Allwinner Technology

CPU:   SUNXI Family
Board: A13-OLinuXino
I2C:   ready
DRAM:  512 MiB
MMC:   SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Hit any key to stop autoboot:  0
reading uEnv.txt

119 bytes read
Loaded environment from uEnv.txt
reading boot.scr

** Unable to read "boot.scr" from mmc 0:1 **
Loading file "boot.scr" from mmc device 0:1 xxa1
Failed to mount ext2 filesystem...
** Bad ext2 partition or disk - mmc 0:1 **
ext2load - load binary file from a Ext2 filesystem

Usage:
ext2load <interface> <dev[:part]> [addr] [filename] [bytes]
    - load binary file 'filename' from 'dev' on 'interface'
      to address 'addr' from ext2 filesystem
Loading file "boot/boot.scr" from mmc device 0:1 xxa1
Failed to mount ext2 filesystem...
** Bad ext2 partition or disk - mmc 0:1 **
ext2load - load binary file from a Ext2 filesystem

Usage:
ext2load <interface> <dev[:part]> [addr] [filename] [bytes]
    - load binary file 'filename' from 'dev' on 'interface'
      to address 'addr' from ext2 filesystem
reading script.bin

28156 bytes read
reading uImage

4230664 bytes read
## Booting kernel from Legacy Image at 48000000 ...
   Image Name:   Linux-3.0.36-r1-xeno-debug+
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    4230600 Bytes = 4 MiB
   Load Address: 40008000
   Entry Point:  40008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
OK

Starting kernel ...

<6>Initializing cgroup subsys cpuset
<5>Linux version 3.0.36-r1-xeno-debug+ (uminded@uminded-desktop) (gcc version 4.6.3 (Ubuntu/Linaro 4.6.3-1ubuntu5) ) #18 PREEMPT Mon Feb 18 17:50:33 CST 2013
CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine: sun5i
DRAM: 512<6>Total Detected Memory: 512MB with 1 banks
<4>Ignoring tag cmdline (using the default kernel command line)
<4>Ignoring unrecognised tag 0x00000000
<6>debug: ignoring loglevel setting.
<6>Memory Reserved(in bytes):
<6>     LCD: 0x5a000000, 0x02000000
<6>     SYS: 0x43000000, 0x00010000
<6>     G2D: 0x58000000, 0x01000000
<6>     VE : 0x44000000, 0x05000000
Memory policy: ECC disabled, Data cache writeback
<7>On node 0 totalpages: 114688
<7>free_area_init_node: node 0, pgdat c083a5a8, node_mem_map c0a86000
<7>  Normal zone: 896 pages used for memmap
<7>  Normal zone: 0 pages reserved
<7>  Normal zone: 113792 pages, LIFO batch:31
<7>pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
<7>pcpu-alloc: [0] 0
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 113792
<5>Kernel command line: mem=448M@0x40000000 console=ttyS0,115200 panic=10 debug ignore_loglevel print_fatal_signals=1 LOGLEVEL=8
<6>PID hash table entries: 2048 (order: 1, 8192 bytes)
<6>Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
<6>Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
<6>Memory: 448MB = 448MB total
<5>Memory: 329196k/329196k available, 129556k reserved, 0K highmem
<5>Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
    DMA     : 0xffc00000 - 0xffe00000   (   2 MB)
    vmalloc : 0xdc800000 - 0xf0000000   ( 312 MB)
    lowmem  : 0xc0000000 - 0xdc000000   ( 448 MB)
    pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
    modules : 0xbf000000 - 0xbfe00000   (  14 MB)
      .init : 0xc0008000 - 0xc0033000   ( 172 kB)
      .text : 0xc0033000 - 0xc07fb000   (7968 kB)
      .data : 0xc07fc000 - 0xc083fdf8   ( 272 kB)
       .bss : 0xc083fe1c - 0xc0a853c0   (2326 kB)
<6>SLUB: Genslabs=11, HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
<6>NR_IRQS:96 nr_irqs:96 96
<6>timer0: Periodic Mode
<6>I-pipe 1.18-11: pipeline enabled.
<6>Console: colour dummy device 80x30
<3>ram_console: buffer   (null), invalid size 0, datasize 4294967284
<6>Calibrating delay loop... <c>1001.88 BogoMIPS (lpj=5009408)
<6>pid_max: default: 32768 minimum: 301
<6>Mount-cache hash table entries: 512
<6>Initializing cgroup subsys cpuacct
<6>Initializing cgroup subsys devices
<6>Initializing cgroup subsys freezer
<6>Initializing cgroup subsys blkio
<6>CPU: Testing write buffer coherency: ok
<6>hw perfevents: enabled with ARMv7 Cortex-A8 PMU driver, 5 counters available
<6>devtmpfs: initialized
<6>print_constraints: dummy:
<6>NET: Registered protocol family 16
<6>hw-breakpoint: debug architecture 0x4 unsupported.
__init timer2_clkevt_init()
[CLKSRC] set up ipipe timer2 clock event irq!
<6>I-pipe, 300.000 MHz clocksource
[CLKSRC] register ipipe timer2 clock event device!
[CLKSRC] set up all-winners clock event irq!
[CLKSRC] register all-winners clock event device!
[CLKSRC] all-winners clock source init!
[CLKSRC] register all-winners clock source!
SOFTWINNER DMA Driver, (c) 2003-2004,2006 Simtec Electronics
<6>Initialize DMAC OK
<6>bio: create slab <bio-0> at 0
<5>SCSI subsystem initialized
<6>usbcore: registered new interface driver usbfs
<6>usbcore: registered new interface driver hub
<6>usbcore: registered new device driver usb
<6>Advanced Linux Sound Architecture Driver Version 1.0.24.
Init eGon pin module V2.0
<6>cfg80211: Calling CRDA to update world regulatory domain
<6>Switching to clocksource ipipe_tsc
<5>FS-Cache: Loaded
<6>CacheFiles: Loaded
<6>timer0: Oneshot Mode
[usb_manager]: CONFIG_USB_SW_SUN5I_USB0_OTG
[sw_hcd0]: usb host driver initialize........
[sw_hcd0]: [sw_hcd_host0]: open_usb_clock
[hcd0]: open, 0x60(0xc141), 0xcc(0x143)
[sw_hcd0]: host_init_state = 0
[sw_hcd0]: platform is usb host
[sw_hcd0]: sw_hcd_init_controller: sw_hcd_host0: USB Host mode controller at f1c13000 using PIO, IRQ 38
<6>sw_hcd_host0 sw_hcd_host0: sw_hcd host driver
<6>sw_hcd_host0 sw_hcd_host0: new USB bus registered, assigned bus number 1
<6>hub 1-0:1.0: USB hub found
<6>hub 1-0:1.0: 1 port detected
wrn: hcd is not enable, need not start hcd
[sw_hcd0]: sw_usb_host0_disable start
-------sw_hcd0_soft_disconnect---------
[sw_hcd_host0]: Set USB Power OFF
wrn: hcd is not enable, need not stop hcd
[sw_hcd0]: sw_usb_host0_disable end
[sw_udc]: udc_init: version 20080411
axp driver uning configuration failed(561)
axp driver uning configuration failed(573)
<6>NET: Registered protocol family 2
<6>IP route cache hash table entries: 4096 (order: 2, 16384 bytes)
<6>TCP established hash table entries: 16384 (order: 5, 131072 bytes)
<6>TCP bind hash table entries: 16384 (order: 4, 65536 bytes)
<6>TCP: Hash tables configured (established 16384 bind 16384)
<6>TCP reno registered
<6>UDP hash table entries: 256 (order: 0, 4096 bytes)
<6>UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
<6>NET: Registered protocol family 1
<6>RPC: Registered named UNIX socket transport module.
<6>RPC: Registered udp transport module.
<6>RPC: Registered tcp transport module.
<6>RPC: Registered tcp NFSv4.1 backchannel transport module.
[pm]aw_pm_init!
<6>audit: initializing netlink socket (disabled)
<5>type=2000 audit(0.190:1): initialized
<6>I-pipe: Domain Xenomai registered.
<6>Xenomai: hal/arm started.
__ipipe_mach_set_dec()
timer2_set_next_clkevt()
[CLKSRC] timer2_set_next_clkevt: 4294966295
__ipipe_mach_set_dec()
timer2_set_next_clkevt()
[CLKSRC] timer2_set_next_clkevt: 4294966295
__ipipe_mach_set_dec()


[Tele]

Do you wanna modify script.bin ? No problem, easy-peasy, we can recompile it.
This is the source of my current script.bin:

Code Select Expand


[product]
version = "1.0"
machine = "A13-EVB-V1.0"

[target]
boot_clock = 1008
dcdc2_vol = 1400
dcdc3_vol = 1200
ldo2_vol = 3000
ldo3_vol = 3300
ldo4_vol = 3300
pll4_freq = 960
pll6_freq = 720

[card_boot]
logical_start = 40960
sprite_gpio0 =

[card_boot0_para]
card_ctrl = 0
card_high_speed = 1
card_line = 4
sdc_d1 = port:PF00<2><1><default><default>
sdc_d0 = port:PF01<2><1><default><default>
sdc_clk = port:PF02<2><1><default><default>
sdc_cmd = port:PF03<2><1><default><default>
sdc_d3 = port:PF04<2><1><default><default>
sdc_d2 = port:PF05<2><1><default><default>

[twi_para]
twi_port = 0
twi_scl = port:PB00<2><1><default><default>
twi_sda = port:PB01<2><1><default><default>

[uart_para]
uart_debug_port = 1
uart_debug_tx = port:PG03<4><1><default><default>
uart_debug_rx = port:PG04<4><1><default><default>

[jtag_para]
jtag_enable = 0
jtag_ms = port:PF00<4><1><default><default>
jtag_ck = port:PF05<4><1><default><default>
jtag_do = port:PF03<4><1><default><default>
jtag_di = port:PF01<4><1><default><default>

[dram_para]
dram_baseaddr = 0x40000000
dram_clk = 408
dram_type = 3
dram_rank_num = 1
dram_chip_density = 2048
dram_io_width = 8
dram_bus_width = 16
dram_cas = 9
dram_zq = 0x7b
dram_odt_en = 0
dram_size = 512
dram_tpr0 = 0x42d899b7
dram_tpr1 = 0xa090
dram_tpr2 = 0x22a00
dram_tpr3 = 0x0
dram_tpr4 = 0x0
dram_tpr5 = 0x0
dram_emr1 = 0x0
dram_emr2 = 0x10
dram_emr3 = 0x0

[nand_para]
nand_used = 1
nand_we = port:PC00<2><default><default><default>
nand_ale = port:PC01<2><default><default><default>
nand_cle = port:PC02<2><default><default><default>
nand_ce1 = port:PC03<2><default><default><default>
nand_ce0 = port:PC04<2><default><default><default>
nand_nre = port:PC05<2><default><default><default>
nand_rb0 = port:PC06<2><default><default><default>
nand_rb1 = port:PC07<2><default><default><default>
nand_d0 = port:PC08<2><default><default><default>
nand_d1 = port:PC09<2><default><default><default>
nand_d2 = port:PC10<2><default><default><default>
nand_d3 = port:PC11<2><default><default><default>
nand_d4 = port:PC12<2><default><default><default>
nand_d5 = port:PC13<2><default><default><default>
nand_d6 = port:PC14<2><default><default><default>
nand_d7 = port:PC15<2><default><default><default>
nand_wp =
nand_ce2 =
nand_ce3 =
nand_ce4 =
nand_ce5 =
nand_ce6 =
nand_ce7 =
nand_spi =
nand_ndqs = port:PC19<2><default><default><default>

[mali_para]
mali_used = 1
mali_clkdiv = 2

[twi0_para]
twi0_used = 1
twi0_scl = port:PB00<2><default><default><default>
twi0_sda = port:PB01<2><default><default><default>

[twi1_para]
twi1_used = 1
twi1_scl = port:PB15<2><default><default><default>
twi1_sda = port:PB16<2><default><default><default>

[twi2_para]
twi2_used = 1
twi2_scl = port:PB17<2><default><default><default>
twi2_sda = port:PB18<2><default><default><default>

[uart_para0]
uart_used = 0
uart_port = 0
uart_type = 2
uart_tx = port:PB19<2><1><default><default>
uart_rx = port:PB20<2><1><default><default>

[uart_para1]
uart_used = 1
uart_port = 1
uart_type = 2
uart_tx = port:PG03<4><1><default><default>
uart_rx = port:PG04<4><1><default><default>

[spi1_para]
spi_used = 0
spi_cs0 = port:PG09<2><default><default><default>
spi_cs1 = port:PG13<2><default><default><default>
spi_sclk = port:PG10<2><default><default><default>
spi_mosi = port:PG11<2><default><default><default>
spi_miso = port:PG12<2><default><default><default>

[spi2_para]
spi_used = 1
spi_cs0 = port:PE00<4><default><default><default>
spi_sclk = port:PE01<4><default><default><default>
spi_mosi = port:PE02<4><default><default><default>
spi_miso = port:PE03<4><default><default><default>

[rtp_para]
rtp_used = 1
rtp_screen_size = 5
rtp_regidity_level = 5
rtp_press_threshold_enable = 0
rtp_press_threshold = 0x1f40
rtp_sensitive_level = 0xf
rtp_exchange_x_y_flag = 0

[ctp_para]
ctp_used = 0
ctp_name = "ft5x_ts"
ctp_twi_id = 2
ctp_twi_addr = 0x70
ctp_screen_max_x = 800
ctp_screen_max_y = 480
ctp_revert_x_flag = 0
ctp_revert_y_flag = 0
ctp_exchange_x_y_flag = 0
ctp_int_port = port:PH21<6><default><default><default>
ctp_wakeup = port:PB13<1><default><default><1>
ctp_io_port = port:PH21<0><default><default><default>

[tkey_para]
tkey_used = 0
tkey_name = "hv_keypad"
tkey_twi_id = 2
tkey_twi_addr = 0x62
tkey_int =

[motor_para]
motor_used = 0
motor_shake =

[disp_init]
disp_init_enable = 1
disp_mode = 0
screen0_output_type = 1
screen0_output_mode = 5
screen1_output_type = 1
screen1_output_mode = 5
fb0_framebuffer_num = 2
fb0_format = 9
fb0_pixel_sequence = 2
fb0_scaler_mode_enable = 0
fb1_framebuffer_num = 2
fb1_format = 9
fb1_pixel_sequence = 2
fb1_scaler_mode_enable = 0

[lcd0_para]
lcd_used = 1
lcd_x = 800
lcd_y = 480
lcd_dclk_freq = 33
lcd_pwm_not_used = 0
lcd_pwm_ch = 0
lcd_pwm_freq = 10000
lcd_pwm_pol = 0
lcd_if = 0
lcd_hbp = 46
lcd_ht = 1055
lcd_vbp = 23
lcd_vt = 1050
lcd_hv_if = 0
lcd_hv_smode = 0
lcd_hv_s888_if = 0
lcd_hv_syuv_if = 0
lcd_hv_vspw = 1
lcd_hv_hspw = 30
lcd_lvds_ch = 0
lcd_lvds_mode = 0
lcd_lvds_bitwidth = 0
lcd_lvds_io_cross = 0
lcd_cpu_if = 0
lcd_frm = 1
lcd_io_cfg0 = 268435456
lcd_gamma_correction_en = 0
lcd_gamma_tbl_0 = 0x0
lcd_gamma_tbl_1 = 0x10101
lcd_gamma_tbl_255 = 0xffffff
lcd_bl_en_used = 1
lcd_bl_en = port:power1<1><0><default><1>
lcd_power_used = 1
lcd_power = port:power0<1><0><default><1>
lcd_pwm_used = 0
lcd_pwm = port:PB02<2><0><default><default>
lcd_gpio_0 =
lcd_gpio_1 =
lcd_gpio_2 =
lcd_gpio_3 =
lcdd0 = port:PD00<2><0><default><default>
lcdd1 = port:PD01<2><0><default><default>
lcdd2 = port:PD02<2><0><default><default>
lcdd3 = port:PD03<2><0><default><default>
lcdd4 = port:PD04<2><0><default><default>
lcdd5 = port:PD05<2><0><default><default>
lcdd6 = port:PD06<2><0><default><default>
lcdd7 = port:PD07<2><0><default><default>
lcdd8 = port:PD08<2><0><default><default>
lcdd9 = port:PD09<2><0><default><default>
lcdd10 = port:PD10<2><0><default><default>
lcdd11 = port:PD11<2><0><default><default>
lcdd12 = port:PD12<2><0><default><default>
lcdd13 = port:PD13<2><0><default><default>
lcdd14 = port:PD14<2><0><default><default>
lcdd15 = port:PD15<2><0><default><default>
lcdd16 = port:PD16<2><0><default><default>
lcdd17 = port:PD17<2><0><default><default>
lcdd18 = port:PD18<2><0><default><default>
lcdd19 = port:PD19<2><0><default><default>
lcdd20 = port:PD20<2><0><default><default>
lcdd21 = port:PD21<2><0><default><default>
lcdd22 = port:PD22<2><0><default><default>
lcdd23 = port:PD23<2><0><default><default>
lcdclk = port:PD24<2><0><default><default>
lcdde = port:PD25<2><0><default><default>
lcdhsync = port:PD26<2><0><default><default>
lcdvsync = port:PD27<2><0><default><default>

[tv_out_dac_para]
dac_used = 1
dac0_src = 0

[hdmi_para]
hdmi_used = 0

[csi0_para]
csi_used = 0
csi_mode = 0
csi_dev_qty = 1
csi_stby_mode = 1
csi_mname = "gc0308"
csi_twi_id = 2
csi_twi_addr = 0x42
csi_if = 0
csi_vflip = 0
csi_hflip = 1
csi_iovdd = ""
csi_avdd = ""
csi_dvdd = ""
csi_flash_pol = 1
csi_mname_b = ""
csi_twi_id_b = 1
csi_twi_addr_b = 0x78
csi_if_b = 0
csi_vflip_b = 1
csi_hflip_b = 0
csi_iovdd_b = ""
csi_avdd_b = ""
csi_dvdd_b = ""
csi_flash_pol_b = 1
csi_pck = port:PE00<3><default><default><default>
csi_ck = port:PE01<3><default><default><default>
csi_hsync = port:PE02<3><default><default><default>
csi_vsync = port:PE03<3><default><default><default>
csi_d0 = port:PE04<3><default><default><default>
csi_d1 = port:PE05<3><default><default><default>
csi_d2 = port:PE06<3><default><default><default>
csi_d3 = port:PE07<3><default><default><default>
csi_d4 = port:PE08<3><default><default><default>
csi_d5 = port:PE09<3><default><default><default>
csi_d6 = port:PE10<3><default><default><default>
csi_d7 = port:PE11<3><default><default><default>
csi_reset = port:power3<1><default><default><0>
csi_power_en =
csi_stby = port:PB10<1><default><default><1>
csi_flash =
csi_af_en =
csi_reset_b =
csi_power_en_b =
csi_stby_b =
csi_flash_b =
csi_af_en_b =

[csi1_para]
csi_used = 0
csi_mode = 0
csi_dev_qty = 1
csi_stby_mode = 1
csi_mname = ""
csi_twi_id = 1
csi_twi_addr = 0xba
csi_if = 0
csi_vflip = 0
csi_hflip = 0
csi_iovdd = ""
csi_avdd = ""
csi_dvdd = ""
csi_flash_pol = 1
csi_mname_b = ""
csi_twi_id_b = 1
csi_twi_addr_b = 0x78
csi_if_b = 0
csi_vflip_b = 1
csi_hflip_b = 0
csi_iovdd_b = ""
csi_avdd_b = ""
csi_dvdd_b = ""
csi_flash_pol_b = 1
csi_reset =
csi_power_en =
csi_stby =
csi_flash =
csi_af_en =
csi_reset_b =
csi_power_en_b =
csi_stby_b =
csi_flash_b =
csi_af_en_b =

[mmc0_para]
sdc_used = 1
sdc_detmode = 1
bus_width = 4
sdc_d1 = port:PF00<2><1><2><default>
sdc_d0 = port:PF01<2><1><2><default>
sdc_clk = port:PF02<2><1><2><default>
sdc_cmd = port:PF03<2><1><2><default>
sdc_d3 = port:PF04<2><1><2><default>
sdc_d2 = port:PF05<2><1><2><default>
sdc_det = port:PG00<0><0><default><default>
sdc_use_wp = 0
sdc_wp =

[mmc1_para]
sdc_used = 0
sdc_detmode =
bus_width =
sdc_cmd =
sdc_clk =
sdc_d0 =
sdc_d1 =
sdc_d2 =
sdc_d3 =
sdc_det =
sdc_use_wp =
sdc_wp =

[mmc2_para]
sdc_used = 0
sdc_detmode = 3
bus_width = 4
sdc_cmd = port:PE08<4><1><2><default>
sdc_clk = port:PE09<4><1><2><default>
sdc_d0 = port:PE04<4><1><2><default>
sdc_d1 = port:PE05<4><1><2><default>
sdc_d2 = port:PE06<4><1><2><default>
sdc_d3 = port:PE07<4><1><2><default>
sdc_det =
sdc_use_wp = 0
sdc_wp =

[ms_para]
ms_used = 0
ms_bs =
ms_clk =
ms_d0 =
ms_d1 =
ms_d2 =
ms_d3 =
ms_det =

[keypad_para]
kp_used = 0
kp_in_size =
kp_out_size =
kp_in0 =
kp_in1 =
kp_in2 =
kp_in3 =
kp_in4 =
kp_in5 =
kp_in6 =
kp_in7 =
kp_out0 =
kp_out1 =
kp_out2 =
kp_out3 =
kp_out4 =
kp_out5 =
kp_out6 =
kp_out7 =

[usbc0]
usb_used = 1
usb_port_type = 2
usb_detect_type = 1
usb_id_gpio = port:PG02<0><1><default><default>
usb_det_vbus_gpio = port:PG01<0><0><default><default>
usb_drv_vbus_gpio = port:PG12<1><0><default><0>
usb_host_init_state = 0

[usbc1]
usb_used = 1
usb_port_type = 1
usb_detect_type = 0
usb_id_gpio =
usb_det_vbus_gpio =
usb_drv_vbus_gpio = port:PG11<1><0><default><0>
usb_host_init_state = 1

[usb_feature]
vendor_id = 6353
mass_storage_id = 1
adb_id = 2
manufacturer_name = "USB Developer"
product_name = "Android"
serial_number = "20080411"

[msc_feature]
vendor_name = "USB 2.0"
product_name = "USB Flash Driver"
release = 100
luns = 3

[gsensor_para]
gsensor_used = 0
gsensor_name = "bma222"
gsensor_twi_id = 1
gsensor_twi_addr = 0x18
gsensor_int1 =
gsensor_int2 =

[gps_para]
gps_used = 0
gps_spi_id =
gps_spi_cs_num =
gps_lradc =
gps_clk =
gps_sign =
gps_mag =
gps_vcc_en =
gps_osc_en =
gps_rx_en =

[sdio_wifi_para]
sdio_wifi_used = 0
sdio_wifi_sdc_id =
sdio_wifi_mod_sel =

[usb_wifi_para]
usb_wifi_used = 1
usb_wifi_usbc_num = 1

[3g_para]
3g_used = 0
3g_name =
3g_usbc_num =
3g_on_off =
3g_reset =
3g_poweron =
3g_wakeup_out =
3g_wakeup_in =

[gy_para]
gy_used = 0
gy_twi_id = 1
gy_twi_addr = 0
gy_int1 =
gy_int2 =

[ls_para]
ls_used = 1
ls_name = "ltr501als"
ls_twi_id = 1
ls_twi_addr =
ls_int =

[compass_para]
compass_used = 0
compass_twi_id =
compass_twi_addr =
compass_int =

[bt_para]
bt_used = 0
bt_uart_id =
bt_mod_type =

[i2s_para]
i2s_used = 0
i2s_channel =
i2s_mclk =
i2s_bclk =
i2s_lrclk =
i2s_dout0 =
i2s_dout1 =
i2s_dout2 =
i2s_dout3 =
i2s_din =

[spdif_para]
spdif_used = 0
spdif_mclk =
spdif_dout =
spdif_din =

[audio_para]
audio_used = 1
audio_pa_ctrl = port:PG10<1><default><default><0>

[ir_para]
ir_used = 0
ir0_rx = port:PB04<2><default><default><default>

[rtc_para]
rtc_used = 1
rtc_name = "pcf8563"
rtc_twi_id = 1
rtc_twi_addr = 81

[pmu_para]
pmu_used = 1
pmu_twi_addr = 52
pmu_twi_id = 0
pmu_irq_id = 0
pmu_battery_rdc = 200
pmu_battery_cap = 2600
pmu_init_chgcur = 300
pmu_earlysuspend_chgcur = 600
pmu_suspend_chgcur = 1000
pmu_resume_chgcur = 300
pmu_shutdown_chgcur = 1000
pmu_init_chgvol = 4200
pmu_init_chgend_rate = 15
pmu_init_chg_enabled = 1
pmu_init_adc_freq = 100
pmu_init_adc_freqc = 100
pmu_init_chg_pretime = 50
pmu_init_chg_csttime = 720
pmu_bat_para1 = 0
pmu_bat_para2 = 0
pmu_bat_para3 = 1
pmu_bat_para4 = 5
pmu_bat_para5 = 7
pmu_bat_para6 = 13
pmu_bat_para7 = 16
pmu_bat_para8 = 26
pmu_bat_para9 = 36
pmu_bat_para10 = 46
pmu_bat_para11 = 53
pmu_bat_para12 = 61
pmu_bat_para13 = 73
pmu_bat_para14 = 84
pmu_bat_para15 = 92
pmu_bat_para16 = 100
pmu_usbvol = 4000
pmu_usbcur = 0
pmu_usbvol_pc = 4000
pmu_usbcur_pc = 0
pmu_pwroff_vol = 3300
pmu_pwron_vol = 2900
pmu_pekoff_time = 6000
pmu_pekoff_en = 1
pmu_peklong_time = 1500
pmu_pekon_time = 1000
pmu_pwrok_time = 64
pmu_pwrnoe_time = 2000
pmu_intotp_en = 1
pmu_used2 = 0
pmu_adpdet =
pmu_init_chgcur2 = 400
pmu_earlysuspend_chgcur2 = 600
pmu_suspend_chgcur2 = 1200
pmu_resume_chgcur2 = 400
pmu_shutdown_chgcur2 = 1200
pmu_suspendpwroff_vol = 3500
pmu_batdeten = 1

[recovery_key]
key_min = 4
key_max = 6

[gpio_para]
gpio_used = 1
gpio_num = 15
gpio_pin_1 = port:PB03<0><default><default><default>
gpio_pin_2 = port:PB04<0><default><default><default>
gpio_pin_3 = port:PB10<0><default><default><default>
gpio_pin_4 = port:PE04<0><default><default><default>
gpio_pin_5 = port:PE05<0><default><default><default>
gpio_pin_6 = port:PE06<0><default><default><default>
gpio_pin_7 = port:PE07<0><default><default><default>
gpio_pin_8 = port:PE08<0><default><default><default>
gpio_pin_9 = port:PE09<0><default><default><default>
gpio_pin_10 = port:PE10<0><default><default><default>
gpio_pin_11 = port:PE11<0><default><default><default>
gpio_pin_12 = port:PG09<1><default><default><default>
gpio_pin_13 = port:PG10<0><default><default><default>
gpio_pin_14 = port:PG11<0><default><default><default>
gpio_pin_15 = port:PB02<0><default><default><0>


Just show me, what do I have to change, or upload a modified script.fex, I will recompile it.

[Tele]

Hello,

i get a running  xenomai on my A13. The base kernel is the sunxi3.4.24 (the dev version some says ago).

I compile and test xenomai application this evening.

Its fine Im happy about that, but you forgot to share any specific code or info with us. It seems you wanna tease us, dont you?

[uMinded]

Hello,

i get a running  xenomai on my A13. The base kernel is the sunxi3.4.24 (the dev version some says ago).

I compile and test xenomai application this evening.

Please share, I found the I-Pipe patch with the current Xenomai release had to many changes to be an easy port (>300) have the sunxi guys recently brought it into sync?

Where you got it, steps you used to compile and a boot log would be appreciated!

[uMinded]

Tele:

The last few lines on that boot log told the story I think. The Xenomai clock was set for a 300MHz clock source but the reload register was set for a 303MHz reload cycle. I was off by a zero in my __ipipe_mach_ticks_per_jiffy.

I will upload another kernel before lunch with the changed rate. I also eagerly await Crubille's news as that 3.4x kernel has quite a few I-Pipe problems fixed deep in the kernel.

[ehj666]

It appears that the script.bin file has kernel parameters that overrule the compiled ones,I have forced ignore kernel options from bootloader and I have added a bunch of prink() calls to my clock code as well as enabled debugging in a few source files.

Can you give this one a go? If we don't get a better output then I am going to need a board to continue as I will need to dump memory and probe with a debugger.

New Debug Kernel

I see a couple posts since I last checked in. I will not be able to test anything until sometime this evening (EST). Specifically, do you want me to test the latest debug kernel with the modified script.bin?

[uMinded]

I see a couple posts since I last checked in. I will not be able to test anything until sometime this evening (EST). Specifically, do you want me to test the latest debug kernel with the modified script.bin?

Their is nothing boot related in the script.bin file. uBoot might have some kernel option suppression turned on or something but building the kernel with options forced works out. In a usual situation their would never be a need to add kernel options so I'm sure its not uBoots fault.

I will build a new kernel with an updated tick rate and see if that doesn't freeze the kernel. The problem was the real time ISR was constantly being called and gave no no time for the system calls to function. I will edit this post with a link within 2-3hrs.

Thanks!

[Tele]

Tele:
I will upload another kernel before lunch with the changed rate.
...

I cant check your code, because of missing documentation. I have no idea about timer registers of A10/A13.
Where the hell did you get the info about the timer control register bits?

Ive seen a suspicious things although:

Code Select Expand


#ifdef CONFIG_IPIPE
static int __init timer2_clkevt_init(void)
{
...
...
    /* config PLL clock source for timer2 */
    TMR_REG_TMR1_CTL |= (2<<2);
    /* configure PLL/4 for 300MHz clock */
    TMR_REG_TMR1_CTL |= (2<<4);
    /* reload inter value */
    TMR_REG_TMR1_CTL |= (1<<1);


You talk about timer2 then you set the timer1 ctl register. Is that what you want indeed, or this is just a copy/paste-forgot-to-modify error?
I cant decide because I donno the meaning of bits,

Who is Jiffy, you can talk about him a bit more.
Currently the function

Code Select Expand

__ipipe_mach_set_dec(unsigned long delay) is called with delay=1000 and that makes those magic numbers 4294966295 = 0xffffffff - 1000
It has something to do with Jiffy?
Teach me, then maybe I can help more.

[uMinded]

A10 Timer Registers

If you follow to procession on code it starts to make since, here is a quick flow:

Code Select Expand

// Call to tell system to init timer
arch_initcall(timer2_clkevt_init);
// Setup clocks, enable timer and define TSC
__init timer2_clkevt_init(void)
  // Register timer with ipipe
  __ipipe_tsc_register(&tsc_info);
  // Enable kernel level IRQ handling
  setup_irq(SW_INT_IRQNO_TIMER2, &timer2_clkevt_irqact);
  // Register timer with kernel
  clockevents_register_device(&timer2_clock_event);

// Structure to point to functions, names, count capacity, etc
static struct clock_event_device timer2_clock_event
static struct irqaction timer2_clkevt_irqact

// Just clears the interrupt bits and calls the function below
static irqreturn_t timer2_clkevt_irq(int irq, void *handle)
// Used to reset the counter, ipipe hijacks this with the __ipipe functions
static int timer2_set_next_clkevt(unsigned long delta, struct clock_event_device *dev)

It the harder part was porting the patches and not remove any needed code, some of the patch lines had no data before/after so you had to insert spinlocks into functions with some forsight.

The timer2 structure delta_max/min I calculated on a 32bit register and 3.3ns(300MHz) clock. The max is only 75% of the max 32bit string but its at around 10 seconds so it will never go that high.

In __ipipe_mach_release_timer() the timer is set to ONESHOT and delayed by __ipipe_mach_ticks_per_jiffy so I assume based on kernel output that Xenomai sets up the timer as ONESHOT and reloads it this way (although the function names do NOT make you think that). Also the __ipipe_mach_ticks_per_jiffy is an exported symbol so the kernel can modify it while running.

Latest & Greatest Kernal


EDIT:
Can you give this one a try too:
3.4.24-r1-xeno-debug
I have been working on getting the 3.4.x patched and some latest merges have made it possible. If this one works then were quite a few steps ahead.

[Tele]

A10 Timer Registers

Thank you very much I couldnt find my glass because it was on my nose. Im so stupid.

If you follow to procession on code it starts to make since, here is a quick flow:

Thank you for the lesson, Im getting there slowly. I started to understand things.
Now Im almost sure there is (or was?) a bug in aw_clocksrc.c

Code Select Expand


#ifdef CONFIG_IPIPE
static int __init timer2_clkevt_init(void)
{
    /* register clock event irq */
    CLKSRC_DBG("set up ipipe timer2 clock event irq!\n");
    /* clear timer2 setting */
    TMR_REG_TMR2_CTL = 0;
    /* initialise timer inter value to 1 tick */
    TMR_REG_TMR2_INTV = TIMER2_HPET_CLOCK_EVENT_HZ/HZ;

    /* config PLL clock source for timer2 */
    TMR_REG_TMR1_CTL |= (2<<2);
    /* configure PLL/4 for 300MHz clock */
    TMR_REG_TMR1_CTL |= (2<<4);
    /* reload inter value */
    TMR_REG_TMR1_CTL |= (1<<1);
...


you have to change

Code Select Expand


    /* config PLL clock source for timer2 */
    TMR_REG_TMR2_CTL |= (2<<2);      // bit 2:3=0x2 TMR_2_CLK_SRC = PLL6 / 6 = 200 MHz!!! PLL6 = 1.2GHz! You forgot to divide it with 6
    /* configure TMR_2_CLK_SRC/1 for 200MHz clock */
//    TMR_REG_TMR2_CTL |= (2<<4);     This line is not necessary because prescale-divisor should be 1, 4:5 bit must be 0x0
    /* reload inter value */
    TMR_REG_TMR2_CTL |= (1<<1);

So you have to change TMR1 -> TMR2, we have nothing to do with TMR1.
And the maximum clock source is 200MHz because PLL6/6 can be the highest clock source for timer2.
You have to change TIMER2_HPET_CLOCK_EVENT_HZ to 200MHz and have to recalculate min/max deltas. It will be 200MHz instead of 300MHz, its still fine, not so few, dont let it bring you down.
Tell me if Im wrong, Im a slow learner, I wont get offended.

Unfortunately I cant test it now, only later, in about 10 hours, because my Oli card isnt here at the moment.
Could you refresh your github's xenomai branch please, I want to see the latest aw_clocksrc.c